Freescale Semiconductor Symphony DSP56724 Reference Manual page 311

ESAI Rx
clock
ESAI-1 Rx
clock
ESAI-2 Rx
clock
ESAI-3 Rx
clock
S/PDIF Rx
clock
ASRCK1
from PLL
AICSA0- AICSA2
AICSB0 - AICSB2
AICSC0 - AICSC2
ESAI Tx
clock
ESAI-1 Tx
clock
ESAI-2 Tx
clock
ESAI-3 Tx
clock
S/PDIF Tx
clock
ASRCK1
pin
AOCSA0 - AOCSA2
AOCSB0 - AOCSB2
AOCSC0 - AOCSC2
Symphony DSP56724/DSP56725 Multi-Core Audio Processors, Rev. 0
Freescale Semiconductor
AICDA0 - AICDA2
Input Clock
Divider A
Input Clock
Divider B
MUX
AICDB0 - AICDB2
Input Clock
Divider C
AICDC0 - AICDC2
AOCDA0 - AOCDA2
Input Clock
Divider A
Input Clock
Divider B
MUX
AOCDB0 - AOCDB2
Input Clock
Divider C
AOCDC0- AOCDC2
Figure 19-20. Clock Source Selector and Divider
Asynchronous Sample Rate Converter
AICPA0 - AICPA2
Input
Prescaler A
Input
Prescaler B
AICPB0 - AICPB2
Input
Input clock C
Prescaler C
AICPC0 - AICPC2
AOCPA0 - AOCPA2
Output
Output clock A
Prescaler A
Output
Output clock B
Prescaler B
AOCPB0 - AOCPB2
Output
Output clock C
Prescaler C
AOCPC0 - AOCPC2
Input clock A
Input clock B
Input
Clocks
Output
Clocks
19-31