Receiver Serial Clock (Sckr) - Freescale Semiconductor Symphony DSP56724 Reference Manual

9.1.7

Receiver Serial Clock (SCKR)

SCKR is a bidirectional pin providing the receivers serial bit clock for the ESAI interface. The direction
of this pin is determined by the RCKD bit in the RCCR register.The SCKR operates as a clock input or
output used by all the enabled receivers in the asynchronous mode (SYN=0), or as serial flag 0 pin in the
synchronous mode (SYN=1).
When this pin is configured as serial flag pin, its direction is determined by the RCKD bit in the RCCR
register. When configured as the output flag OF0, this pin reflects the value of the OF0 bit in the SAICR
register, and the data in the OF0 bit shows up at the pin synchronized to the frame sync being used by the
transmitter and receiver sections. When this pin is configured as the input flag IF0, the data value at the
pin is stored in the IF0 bit in the SAISR register, synchronized by the frame sync in normal mode or the
slot in network mode.
SCKR may be programmed as a general-purpose I/O pin (PC0) when the ESAI SCKR function is not being
used.
Although the external ESAI serial clock can be independent of and
asynchronous to the DSP system clock, the DSP clock frequency must be at
least four times the external ESAI serial clock frequency and each ESAI
serial clock phase must exceed the minimum of two DSP clock periods.
For SCKR pin mode definitions, see
Table 9-1 provides a list of asynchronous-mode receiver clock sources. For more information about
EXTAL/ESAI0/2 clocking control bits (ERI0,ERO0), see
(GPIO)."
Table 9-1. Receiver Clock Sources (Asynchronous Mode Only)
RHCKD RFSD
0 0
0 0
0 1
0 1
1 0
1 0
1 0
1 0
1 0
1 0
1 0
Symphony DSP56724/DSP56725 Multi-Core Audio Processors, Rev. 0
Freescale Semiconductor
Table 9-7.
RCKD ERI0 ERO0
0 N/A
1 N/A
0 N/A
1 N/A
0 0
0 0
0 1
0 1
1 0
1 0
1 1
Enhanced Serial Audio Interface (ESAI, ESAI_1, ESAI_2, ESAI_3)
NOTE
Chapter 8, "General Purpose Input/Output
Receiver
Bit-Clock
Source
N/A SCKR
N/A HCKR
N/A SCKR
N/A HCKR
0 SCKR
1 SCKR
0 SCKR
1 SCKR
0 Fsys
1 Fsys
0 EXTAL
OUTPUTS
— —
— —
— FSR
— FSR
HCKR —
HCKR —
HCKR —
HCKR —
HCKR —
HCKR —
HCKR —
—
SCKR
—
SCKR
—
—
—
—
SCKR
SCKR
SCKR
9-5