Introduction - Freescale Semiconductor Symphony DSP56724 Reference Manual

Multi-core audio processors
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Chapter 8
General Purpose Input/Output (GPIO)
8.1

Introduction

The DSP56724/DSP56725 provides up to 79 bidirectional signals that can be configured as GPIO function
signals or as peripheral function signals. All of these signals (except PG0, PG5, PG6, PG7, PG8, PH4, and
PH4_1) are GPIO by default after reset. The techniques for register programming for all GPIO
functionality is similar between these interfaces. This section describes how signals may be used as GPIO.
8.2
Programming Model
The signals description section of this manual describes the special uses of these signals in detail. There
are ten groups of these signals, which can be controlled separately or as groups. See
GPIO Group
1
Port C
2
Port H
3
Port E
4
Timer GPIO
5
Port G
6
Port C1
7
Port H1
8
Port E1
9
Timer_1 GPIO
10
Port A
Symphony DSP56724/DSP56725 Multi-Core Audio Processors Reference Manual, Rev. 0
Freescale Semiconductor
Table 8-1. GPIO Pins Summary Table
Function-Shared Pins
Shared with ESAI signals
Shared with SHI signals
Shared with ESAI_1 signals
Shared with timer event counter (TEC) signals
Shared with S/PDIF/ signals, PLOCK, External IRQs, and some
dedicated GPIO Port G signals.
Shared with ESAI_2 signals
Shared with SHI_1 signals
Shared with ESAI_3 signals
Shared with timer event counter (TEC_1) signals
Shared with EMC signals
Total GPIO Pin Number
Table
8-1.
Available Pins in Different
Packages
DSP5724
DSP56725
144-Pin
80-Pin
10
10
1
1
4
4
0
0
7
5
4
4
0
0
10
9
0
0
27
0
65
33
8-1

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