Freescale Semiconductor Symphony DSP56724 Reference Manual page 110

Clock Generation Module (CGM)
Extal NR
(=Fosc/NR)
(MHz) (=R+1)
24.576 12
24.576 12
24.576 12
24.576 12
24.576 12
24.576 12
24.576 12
24.576 12
24.576 12
24.576 12
24.576 4
24.576 4
12.288 6
12.288 6
12.288 6
12.288 6
12.288 6
12.288 2
12.288 2
11.290 5
11.290 5
11.290 5
11.290 2
11.290 2
11.290 2
11.290 2
• The line highlighted with
• The lines highlighted with
may not be 50%.
• The lines highlighted with
each Extal frequency.
Symphony DSP56724/DSP56725 Multi-Core Audio Processors, Rev. 0
7-10
Table 7-9. PLL Programming Examples
Fref
NF
(=F+1)
(2~8 MHz) (200~400 MHz)
2.048 98
2.048 195
2.048 194
2.048 191
2.048 181
2.048 171
2.048 157
2.048 180
2.048 147
2.048 98
6.144 65
6.144 33
2.048 98
2.048 195
2.048 194
2.048 185
2.048 176
6.144 64
6.144 33
2.258 89
2.258 177
2.258 176
5.645 70
5.645 69
5.645 36
5.645 37
Green
Fvco
NO
(=Fref*NF)
(=2^OD)
200.704 1
399.360 2
397.312 2
391.168 2
370.688 2
350.208 2
321.536 2
368.640 2
301.056 2
200.704 8
399.360 2
202.752 1
200.704 1
399.360 2
397.312 2
378.880 2
360.448 2
393.216 2
202.752 1
200.955 1
399.652 2
397.394 2
395.136 2
389.491 2
203.213 1
208.858 1
NOTE:
is the default PLL configuration.
Yellow are Fout >200 MHz. The duty cycle
Blue are the recommended PLL settings for
PLL Output
PLL Setting
(=Fvco/NO)
(0x)
(MHz)
200.704 2B4061
199.680 2B60C2
198.656 2B60C1
195.584 2B60BE
185.344 2B60B4
175.104 2B60AA
160.768 2B609C
184.320 2B60B3
150.528 2B6092
25.088 2BE061
199.680 236040
202.752 234020
200.704 254061
199.680 2560C2
198.656 2560C1
189.440 2560B8
180.224 2560AF
196.608 21603F
202.752 214020
200.955 244059
199.826 2460B0
198.697 2460AF
197.568 216045
194.746 216044
203.213 214023
208.858 214024
Freescale Semiconductor