Table of Contents
Advertisement
in which the DSP56300 core shuts down, but the peripherals and interrupt controller continue to
operate, so that an interrupt can bring the chip out of Wait mode. In Stop mode, even more of
circuitry is shut down for the lowest power consumption. Several different methods are available
to bring the chip out of Stop mode: hardware RESET, IRQA, and DE.
1.4
Overview of Peripherals
The peripherals include the following:
•
DMA
•
PIC
•
ESAI
•
SHI
•
TEC
•
WDT
•
CIM
•
S/PDIF
•
ASRC
•
EMC
•
CGM
•
Shared memory
•
ICC
•
Shared bus arbiters
•
Chip configuration module
•
JTAG controller
1.4.1
Direct Memory Access Controller (DMA, DMA_1)
The DMA controller enables data transfers without any interactions with the DSP cores. During DMA
accesses, it supports any combination of source and destination between internal memory, internal
peripheral I/O, and external memory. DMA features include:
•
Eight DMA channels supporting internal and external accesses
•
One-, two-, and three-dimensional transfers (including circular buffering)
•
End-of-block-transfer interrupts
•
Triggering from interrupt lines and all peripherals
1.4.2
Program Interrupt Controller (PIC, PIC_1)
The Program Interrupt Controller arbitrates among all interrupt requests (internal interrupts and the five
external requests IRQA, IRQB, IRQC, IRQD, and NMI), and generates the appropriate interrupt vector
address.
Symphony DSP56724/DSP56725 Multi-Core Audio Processors, Rev. 0
Freescale Semiconductor
Introduction
1-5
Advertisement
Table of Contents
