Port 0 Alternate Device Id Command And Status Register (P0Adidcsr) - Freescale Semiconductor MSC8144E Reference Manual

®
Serial RapidIO Controller
16.6.43 Port 0 Alternate Device ID Command and Status Register
(P0ADIDCSR)
P0ADIDCSR Port 0 Alternate Device ID Command and Status Register
Bit 31 30 29 28
ADE
TYPE R/W
RESET 0 0 0
Bit 15 14 13 12
TYPE
RESET 0 0 0
P0ADIDCSR contains an alternate device ID. This register should be enabled before the initiator
enabled bit of the PGCCSR is set (see Table 16-60, PGCCSR Field Descriptions, on page
16-122). Therefore, when the PGCCSR bit is enabled, all other devices in the RapidIO system
(including switches) send and receive packets from the device ID in P0ADIDCSR instead of the
device ID in BDIDCSR. When the alternate deviceID is enabled, inbound RapidIO endpoint
accepts only packets sent with the device ID in P0ADIDCSR or the deviceID in BDIDCSR. An
exception is Accept All mode, in which the inbound RapidIO Endpoint accept packets using the
same common transport system. The outbound RapidIO endpoint generates requests using only
the device ID in P0ADIDCSR. It generates responses with the deviceID in the original request
packet (either from P0ADIDCSR or BDIDCSR). The selection between a large or small transport
system is done during the power-up sequence by using the CTLS bit in the RCW.
Bit Reset
ADE 0 Alternate Device ID Enable
31 Causes the port to use the device ID specified in this register instead of the device ID specified in
BDIDCSR.
— 0 Reserved. Write to zero for future compatibility.
30–24
ADID 0 Alternate Device ID
23–16 Alternate device ID in a small transport system.
LADID 0 Large Alternate Device ID
15–0 Alternate device ID for the device in a large transport system.
16-150
27 26 25
—
R
0 0 0 0
11 10 9
0 0 0 0
Table 16-85. P0ADIDCSR Field Descriptions
MSC8144E Reference Manual, Rev. 3
24 23 22 21
0 0 0 0
8 7 6 5
LADID
R/W
0 0 0 0
Description
Offset 0x10100
20 19 18 17
ADID
R/W
0 0 0 0
4 3 2 1
0 0 0 0
Freescale Semiconductor
16
0
0
0