Tdmx Transmit Interrupt Enable Register (Tdmxtier) - Freescale Semiconductor MSC8144E Reference Manual

Quad core media signal processor
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Table 19-34. TDMxRIER Bit Descriptions (Continued)
Name
Reset
OLBEE
0
Overrun Local Buffer Event Enable
2
Enable assertion of an interrupt when the Overrun Local
Buffer Event (OLBE) bit is set (see page 19-69).
RFTEE
0
Receive First Threshold Event Enable
1
Enable assertion of the receive first threshold interrupt
when the Receive First threshold Event (RFTE) bit is set
(see page 19-69).
RSTEE
0
Receive Second Threshold Event Enabled
0
Enable assertion of the receive second threshold
interrupt when the Receive Second Threshold Event
(RSTE) bit is set (see page 19-69).

19.7.2.11 TDMx Transmit Interrupt Enable Register (TDMxTIER)

TDMxTIER
Bit
31
30
29
Type
Reset
0
0
0
Bit
15
14
13
Type
Reset
0
0
0
TDMxTIER has the same bit format as the TDMxTER registers. If a TDMxTIER bit is clear, the
corresponding event in the TDMxTER is masked (see page 19-70).
Name
Reset
0
Reserved. Write to zero for future compatibility.
31–4
TSEIE
0
Transmit Sync Error Event Enabled
3
Enable assertion of the transmit error interrupt
when the Transmit Sync Error (TSE) bit is set.
See page 19-70.
ULBEE
0
Underrun Local Buffer Event Enabled
2
Enable assertion of an interrupt when the
Underrun Local Buffer Event (ULBE) bit is set.
See page 19-70.
TFTEE
0
Transmit First Threshold Event Enabled
1
Enable assertion of the transmit first threshold
interrupt when the Transmit First Threshold
Event (TSTE) bit is set. See page 19-70.
Freescale Semiconductor
Description
TDMx Transmit Interrupt Enable Register
28
27
26
25
0
0
0
0
12
11
10
9
0
0
0
0
Table 19-35. TDMxTIER Bit Descriptions
Description
MSC8144E Reference Manual, Rev. 3
0
1
0
1
0
1
24
23
22
21
R/W
0
0
0
0
8
7
6
5
R/W
0
0
0
0
0
Transmit sync error interrupt is disabled.
1
Transmit sync error interrupt is enabled.
0
Underrun Local buffer event is masked.
1
Underrun Local buffer event is enabled.
0
Transmit first threshold interrupt is disabled.
1
Transmit first threshold interrupt is enabled.
TDM Programming Model
Settings
Overrun Local buffer event is
masked.
Overrun Local buffer event is
enabled.
Receive first threshold interrupt is
disabled.
Receive first threshold interrupt is
enabled.
Receive second threshold
interrupt is disabled.
Receive second threshold
interrupt is enabled
Offset 0x3F70
20
19
18
17
0
0
0
0
4
3
2
1
TSEIE ULBEETFTEE TSTEE
0
0
0
0
Settings
16
0
0
0
19-65

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