Interrupt Clear Register (Bits 8-15); Interrupt Level Register 1 (Bits 24-31) - Motorola MVME172 Programmer's Reference Manual

VMEchip2

Interrupt Clear Register (bits 8-15)

2
ADR/SIZ
BIT
NAME
OPER
RESET

Interrupt Level Register 1 (bits 24-31)

ADR/SIZ
BIT
NAME
OPER
RESET
2-88
15 14 13
CSW7 CSW6 CSW5
C C
X X
This register is used to clear the edge software interrupts. An interrupt is
cleared by writing a one to its clear bit. The clear bits are:
CSW0 Clear software 0 interrupt.
CSW1 Clear software 1 interrupt.
CSW2 Clear software 2 interrupt.
CSW3 Clear software 3 interrupt.
CSW4 Clear software 4 interrupt.
CSW5 Clear software 5 interrupt.
CSW6 Clear software 6 interrupt.
CSW7 Clear software 7 interrupt.
$FFF40078 (8 bits [6 used] of 32)
31 30 29
ACF LEVEL
R/W
0 PSL
This register is used to define the level of the abort interrupt and the
ACFAIL interrupt.
AB LEVEL Not used on MVME172.
ACF LEVEL These bits define the level of the ACFAIL interrupt.
$FFF40074 (8 bits of 32)
12 11
CSW4 CSW3
C C C
X X X
28 27
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10 9 8
CSW2 CSW1 CSW0
C C C
X X X
26 25 24
AB LEVEL
R/W
0 PSL