Miscellaneous Control Register - Motorola MVME172 Programmer's Reference Manual

Miscellaneous Control Register

ADR/SIZ
BIT 7
NAME
MPIRQEN
OPER
R/W
RESET
0 PSL
DISBGN
ENINT
DISBSYT
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$FFF4008C (8 bits of 32)
6 5 4
REVEROM DISSRAM DISMST
R/W R/W R/W
0 PSL 0 PSL 0 PS
When this bit is high, the VMEbus BGIN filters are
disabled. When this bit is low, the VMEbus BGIN filters
are enabled. This bit should not be set.
When this bit is high, the local bus interrupt filters are
enabled. When this bit is low, the local bus in- terrupt
filters are disabled. This bit should not be set.
When this bit is low, the minimum VMEbus BBSY* time
when the local bus master has been retried off the local
bus is 32 local bus clocks. When this bit is high, the
minimum VMEbus BBSY* time when the local bus
master has been retried off the local bus is 3 local bus
clocks.
When a local bus master attempts to access the VMEbus
and a VMEbus master attempts to access the local bus, a
deadlock is created. The VMEchip2 detects this condition
and requests the local bus master to give up the local bus
and retry the cycle. This allows the VMEbus master to
complete the cycle to the local bus. If the VMEchip2
receives VMEbus mastership, the local master has not
returned from the retry, and this bit is high, VMEchip2
drives VMEbus BBSY* for the minimum time (about 90
ns) and then releases the VMEbus. If the local master does
not return from the retry within this 90 ns window, the
board loses its turn on the VMEbus. If the VMEchip2
receives VMEbus mastership, the local master has not
returned from the retry, and this bit is low, VMEchip2
drives VMEbus BBSY* for a minimum of 32 local bus
clocks, which allows the local bus master time to return
LCSR Programming Model
3 2
NOELBBSY DISBSYT ENINT
R/W R/W R/W
0 PS 0 PS 0 PS
2
1 0
DISBGN
R/W
0 PS
2-99