Motorola MVME172 Programmer's Reference Manual page 42

Vme embedded controller
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Board Description and Memory Maps
1
VMEchip2 LCSR Base Address = $FFF40000
OFFSET:
31
4C
50
54
58
5C
SCON
60
64
31
AC
68
FAIL
IRQ
EN
6C
IRQ
31
70
CLR
74
IRQ
31
78
7C
80
84
VECTOR BASE
88
8C
1-24
Table 1-7. VMEchip2 Memory Map (Sheet 2 of 3)
30
29
28
27
26
SYS
BRD
PURS
CLR
FAIL
FAIL
STAT
PURS
STAT
STAT
30
29
28
27
26
AB
SYS
MWP
PE
IRQ1E
IRQ
FAIL
BERR
IRQ
IRQ
IRQ
IRQ
EN
EN
EN
EN
EN
IRQ
IRQ
IRQ
IRQ
IRQ
30
29
28
27
26
CLR
CLR
CLR
CLR
CLR
IRQ
IRQ
IRQ
IRQ
IRQ
30
29
28
27
26
AC FAIL
IRQ LEVEL
VME IACK
IRQ LEVEL
SW7
IRQ LEVEL
SPARE
IRQ LEVEL
VECTOR BASE
REGISTER 0
REGISTER 1
25
24
23
22
21
ARB
DMA
BGTO
TIME OFF
EN
BRD
RST
SYS
WD
WD
FAIL
SW
RST
CLR
CLR
OUT
EN
TO
CNT
25
24
23
22
21
TIC2
TIC1
VME
DMA
SIG3
IRQ
IRQ
IACK
IRQ
IRQ
IRQ
EN
EN
EN
EN
EN
IRQ
IRQ
IRQ
IRQ
IRQ
25
24
23
22
CLR
CLR
CLR
CLR
CLR
IRQ
IRQ
IRQ
IRQ
IRQ
25
24
23
22
ABORT
SYS FAIL
IRQ LEVEL
IRQ LEVEL
DMA
SIG 3
IRQ LEVEL
IRQ LEVEL
SW6
SW5
IRQ LEVEL
IRQ LEVEL
VME IRQ 7
VME IRQ 6
IRQ LEVEL
IRQ LEVEL
MST
SYS
AC
IRQ
FAIL
FAIL
EN
LEVEL
LEVEL
This sheet continues on facing page.
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20
19
18
17
VME
DMA
GLOBAL
TIME ON
TIMER
TICK TIMER 1
TICK TIMER 1
TICK TIMER 2
TICK TIMER 2
WD
TO
WD
WD
TO
BF
SRST
RST
STAT
EN
LRST
EN
20
19
18
17
SIG2
SIG1
SIG0
LM1
IRQ
IRQ
IRQ
IRQ
EN
EN
EN
EN
IRQ
IRQ
IRQ
IRQ
21
20
19
18
17
CLR
CLR
CLR
CLR
IRQ
IRQ
IRQ
IRQ
21
20
19
18
17
MST WP ERROR
IRQ LEVEL
SIG 2
IRQ LEVEL
SW4
IRQ LEVEL
VME IRQ 5
IRQ LEVEL
ABORT
GPIOEN
LEVEL
16
WD
EN
PRE
16
LM0
IRQ
EN
IRQ
16
CLR
IRQ
16

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