SCC
SCC #1
(All MVME172
modules)
SCC #2
(200/300-Series
MVME172
only)
Note
http://www.mcg.mot.com/literature
Table 1-12. Z85230 SCC Register Addresses
Z85230 SCC Register
Port B Control
Port B Data
Port A Control
Port A Data
Port B Control
Port B Data
Port A Control
Port A Data
A bug in MVME172s that have MC2 chip revision $01 does
not allow the data registers to be accessed directly. You must
access them indirectly via the SCC chip. The software must
send a command to the control register that tells it that the
next thing read or written to the control register will go to the
data register. The following two macros are examples:
is a pointer to the base address of the SCC.
dev_addr
is the offset to the SCC control register #0.
SCCR0
#define READ_SCC(VAR_NAME)\
dev_addr[SCCR0] = 0x08;\
(VAR_NAME) = dev_addr[SCCR0]
#define WRITE_SCC(VAR_NAME)\
dev_addr[SCCR0] = 0x08;\
dev_addr[SCCR0] = (VAR_NAME)
Memory Maps
Address
$FFF45001
$FFF45003
$FFF45005
$FFF45007
$FFF45801
$FFF45803
$FFF45805
$FFF45807
1-37
1