Motorola MVME172 Programmer's Reference Manual page 249

Table 4-3. IP2 Chip Memory Map - Control and Status Registers (Continued)
IP2 Chip Base Address = $FFFBC000
Register
Register Name
Offset
DMAC for IndustryPack a, request 0. This register set is referred to as DMACa in the text.
$20 DMA_a
STATUS
$21 DMA_a INT
CTRL
$22 DMA ENABLE
$23 RESERVED
$24 DMA_a CON- DHALT
TROL 1
$25 DMA_a
CONTROL 2
$26 RESERVED
$27 RESERVED
$28 DMA_a LB LBA31
ADDR
$29 DMA_a LB LBA23
ADDR
$2A DMA_a LB LBA15
ADDR
$2B DMA_a LB
ADDR
$2C DMA_a IP
ADDR
$2D DMA_a IP
ADDR
$2E DMA_a IP
ADDR
$2F DMA_a IP
ADDR
$30 DMA_a BYTE
CNT
$31 DMA_a BYTE BCNT23
CNT
$32 DMA_a BYTE BCNT15
CNT
$33 DMA_a BYTE BCNT7
CNT
$34 DMA_a TBL
ADDR
$35 DMA_a TBL
ADDR
$36 DMA_a TBL
ADDR
$37 DMA_a TBL
ADDR
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D7 D6 D5
0 DLBE 0
0 0 DINT
0 0 0
0 0 0
0 DTBL
INTE 0 DMAEI
0 0 0
0 0 0
LBA30 LBA29
LBA22 LBA21
LBA14 LBA13
LBA7 LBA6 LBA5
0 0 0
IPA23 IPA22 IPA21
IPA15 IPA14 IPA13
IPA7 IPA6 IPA5
0 0 0
BCNT22 BCNT21
BCNT14 BCNT13
BCNT6 BCNT5
TA31 TA30 TA29
TA23 TA22 TA21
TA15 TA14 TA13
TA7 TA6 TA5
Register Bit Names
D4 D3 D2
IPEND CHANI TBL
DIEN DICLR DIL2
0 0 0
0 0 0
ADMA WIDTH1 WIDTH0
DMAEO ENTO TOIP
0 0 0
0 0 0
LBA28 LBA27 LBA26
LBA20 LBA19 LBA18
LBA12 LBA11 LBA10
LBA4 LBA3 LBA2
0 0 0
IPA20 IPA19 IPA18
IPA12 IPA11 IPA10
IPA4 IPA3 IPA2
0 0 0
BCNT20 BCNT19 BCNT18
BCNT12 BCNT11 BCNT10
BCNT4 BCNT3 BCNT2
TA28 TA27 TA26
TA20 TA19 TA18
TA12 TA11 TA10
TA4 TA3 TA2
Programming Model
D1 D0
IPTO DONE
DIL1 DIL0
0 DEN
0 0
0 XXX
0 0
0 0
0 0
LBA25 LBA24
LBA17 LBA16
LBA9 LBA8
LBA1 LBA0
0 0
IPA17 IPA16
IPA9 IPA8
IPA1 IPA0
0 0
BCNT17 BCNT16
BCNT9 BCN8
BCNT1 BCNT0
TA25 TA24
TA17 TA16
TA9 TA8
TA1 TA0
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