Table 2-3. Local Bus Interrupter Summary (Continued)
DMAC
VMEbus Interrupter Acknowledge
Tick Timer 1
Tick Timer 2
VMEbus IRQ1 Edge-Sensitive
(Not used on MVME172)
VMEbus Master Write Post Error
VMEbus SYSFAIL
(Not used on MVME172)
VMEbus ACFAIL
Notes 1. X = The contents of vector base register 0.
http://www.mcg.mot.com/literature
Interrupt
2. Y = The contents of vector base register 1.
3. Refer to the Vector Base Register description later in this
chapter for recommended Vector Base Register values.
LCSR Programming Model
Priority for Simultaneous
Vector
Interrupts
$X6
$X7
$X8
$X9
$XA
$XB
$XC
$XD
$XE
$XF
:
:
Highest
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