Vmebus Slave Address Modifier Select Register 2 - Motorola MVME172 Programmer's Reference Manual

VMEbus Slave Address Modifier Select Register 2

ADR/SIZ
BIT 23
NAME
SUP
OPER
R/W
RESET
0 PSL
This register is the address modifier select register for the second VMEbus
to local bus map decoder. There are three groups of address modifier select
bits: DAT, PGM, BLK and D64; A24 and A32; and USR and SUP. At least
one bit must be set from each group to enable the map decoder.
DAT
PGM
BLK
D64
A24
http://www.mcg.mot.com/literature
$FFF40010 (8 bits of 32)
22 21 20
USR A32 A24
R/W R/W R/W
0 PSL 0 PSL 0 PSL
When this bit is high, the second map decoder responds to
VMEbus data access cycles. When this bit is low, the
second map decoder does not respond to VMEbus data
access cycles.
When this bit is high, the second map decoder responds to
VMEbus program access cycles. When this bit is low, the
second map decoder does not respond to VMEbus
program access cycles.
When this bit is high, the second map decoder responds to
VMEbus block access cycles. When this bit is low, the
second map decoder does not respond to VMEbus block
access cycles.
When this bit is high, the second map decoder responds to
VMEbus D64 block access cycles. When this bit is low,
the second map decoder does not respond to VMEbus
D64 block access cycles.
When this bit is high, the second map decoder responds to
VMEbus A24 (standard) access cycles. When this bit is
low, the second map decoder does not respond to
VMEbus A24 access cycles.
LCSR Programming Model
19 18 17
D64 BLK PGM
R/W R/W R/W
0 PSL 0 PSL 0 PSL
2
16
DAT
R/W
0 PSL
2-33