Table 2-1. Vmechip2 Memory Map - Lcsr Summary (Sheet 1 Of 2) - Motorola MVME172 Programmer's Reference Manual

Vme embedded controller
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VMEchip2

Table 2-1. VMEchip2 Memory Map - LCSR Summary (Sheet 1 of 2)

2
VMEchip2 LCSR Base Address = $FFF40000
OFFSET:
31
0
4
8
C
10
31
14
18
1C
20
24
MAST
MAST
28
D16
EN
2C
31
30
34
38
3C
40
44
TICK
48
2-22
30
29
28
27
26
SLAVE ADDRESS TRANSLATION ADDRESS 1
SLAVE ADDRESS TRANSLATION ADDRESS 2
ADDER
2
30
29
28
27
26
MASTER ENDING ADDRESS 1
MASTER ENDING ADDRESS 2
MASTER ENDING ADDRESS 3
MASTER ENDING ADDRESS 4
MASTER ADDRESS TRANSLATION ADDRESS 4
WP
MASTER AM 4
EN
GCSR GROUP SELECT
30
29
28
27
26
TICK
CLR
IRQ
2/1
IRQ 1
IRQ
STAT
EN
25
24
23
22
SLAVE ENDING ADDRESS 1
SLAVE ENDING ADDRESS 2
SNP
WP
SUP
USR
2
2
2
2
25
24
23
22
MAST
MAST
D16
WP
EN
EN
GCSR
BOARD SELECT
25
24
23
22
WAIT
RMW
VMEBUS
VMEBUS INTERRUPT VECTOR
INTERRUPT
LEVEL
This sheet continues on facing page.
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21
20
19
18
17
BLK
A32
A24
BLK
PRGM
D64
2
2
2
2
2
21
20
19
18
17
MASTER AM 3
MAST
MAST
MAST
4
3
2
EN
EN
EN
21
20
19
18
17
ROM
DMA TB
SRAM
ZERO
SNP MODE
SPEED
DMA CONTROLLER
DMA CONTROLLER
DMA CONTROLLER
DMA CONTROLLER
16
DATA
2
16
MAST
1
EN
16

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