Flash Access Time Control Register - Motorola MVME172 Programmer's Reference Manual

MC2 Chip
3

Flash Access Time Control Register

ADR/SIZ
BIT
NAME
OPER
RESET
3-40
ROM0 Refer to the table on the Local Bus Memory Map, Note 1,
in Chapter 1.
The MVME172 is populated with a 120ns Flash memory device. Due to
the wide range of Flash speeds, the contents can be changed by software to
adjust for a specific speed.
15 14 13
R R
0 0
FWEN Flash write enable function is internal to the ASIC for the
MC2 chip. FWEN set to a 1 enables writes to the Flash
memory space. FWEN set to a 0 inhibits writes to the
Flash memory but the cycle completes without exception.
FT2-FT0 Flash memory access time is controlled by the state of
FT2-FT0. The following table defines the FT2-FT0
encoding (for the MVE172, whose bus frequency is
processor frequency, only the 33MHz column applies).
FT2-
FT0
$0
$1
$2
$3
$4
$5
$6
$7
$FFF42040 (8 bits)
12 11
FWEN
R R R/W
0 0 0
Flash Access <= N
at 25 MHz where N =
60 ns
100 ns
140 ns
180 ns
220 ns
260 ns
300 ns
340 ns
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10 9 8
FT2 FT1 FT0
R/W R/W R/W
1 PL 1 PL 1 PL
1 / the
2
Flash Access <= N
at 33 MHz where N =
40 ns
70 ns
100 ns
130 ns
160 ns
190 ns
210 ns
240 ns