Local Bus Interrupter Enable Register (Bits 24-31) - Motorola MVME172 Programmer's Reference Manual

VMEchip2

Local Bus Interrupter Enable Register (bits 24-31)

2
ADR/SIZ
BIT
NAME
OPER
RESET
2-82
31 30 29
EACF EAB ESYSF
R/W R/W R/W
0 PSL 0 PSL 0 PSL
This register is the local bus interrupter enable register. When an enable bit
is high, the corresponding interrupt is enabled. When an enable bit is low,
the corresponding interrupt is disabled. The enable bit does not clear
edge-sensitive interrupts or prevent the flip flop from being set. If
necessary, edge-sensitive interrupters should be cleared to remove any old
interrupts and then enabled.
ETIC1 Enable tick timer 1 interrupt.
ETIC2 Enable tick timer 2 interrupt.
EVI1E Enable VMEbus IRQ1 edge-sensitive interrupt.
EPE Not used on MVME172.
EMWP Enable VMEbus master write post error interrupt.
ESYSF Enable VMEbus SYSFAIL interrupt.
EAB Not used on MVME172.
EACF Enable VMEbus ACFAIL interrupt.
$FFF4006C (8 bits of 32)
28 27
EMWP EPE
R/W R/W
0 PSL 0 PSL
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26 25 24
EVI1E ETIC2 ETIC1
R/W R/W R/W
0 PSL 0 PSL 0 PSL