Board Control Register - Motorola MVME172 Programmer's Reference Manual

Board Control Register

ADR/SIZ
BIT
31
NAME
OPER
RESET
RSWE
BDFLO
CPURS
PURS
BRFLI
SFFL
SCON
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$FFF40060 (8 bits [7 used] of 32)
30 29 28
SCON SFFL BRFLI
R R R
X X 1 PSL
The switch enable bit is used with the "no
RESET
VMEbus interface" option. This bit is duplicated at the
same bit position in the MC2 chip at location $FFF42044.
When this bit or the duplicate bit in the MC2 chip is high,
the switch is enabled. When both bits are low, the
RESET
switch is disabled.
RESET
When this bit is high, the VMEchip2 asserts the
BRDFAIL signal pin. When this bit is low, this bit does
not contribute to the BRDFAIL signal on the VMEchip2.
When this bit is set high, the powerup reset status bit is
cleared. This bit is always read zero.
This bit is set by a powerup reset. It is cleared by a write
to the CPURS bit.
When this status bit is high, the BRDFAIL signal pin on
the VMEchip2 is asserted. When this status bit is low, the
BRDFAIL signal pin on the VMEchip2 is not asserted.
The BRDFAIL pin may be asserted by an external device,
the BDFLO bit in this register, or a watchdog time-out.
When this status bit is high, the SYSFAIL signal line on
the VMEbus is asserted. When this status bit is low, the
SYSFAIL signal line on the VMEbus is not asserted.
When this status bit is high, the VMEchip2 is configured
as system controller. When this status bit is low, the
VMEchip2 is not configured as system controller.
LCSR Programming Model
27 26 25
PURS CPURS BDFLO RSWE
R C R/W
1 P 0 PS 1 PSL
2
24
R/W
1 P
2-71