Motorola MVME172-243 Manuals

Manuals and User Guides for Motorola MVME172-243. We have 1 Motorola MVME172-243 manual available for free PDF download: Programmer's Reference Manual

Motorola MVME172-243 Programmer's Reference Manual

Motorola MVME172-243 Programmer's Reference Manual (354 pages)

VME Embedded Controller  
Brand: Motorola | Category: Controller | Size: 3.34 MB
Table of contents
Table Of Contents7................................................................................................................................................................
Introduction19................................................................................................................................................................
Overview19................................................................................................................................................................
Table 1-1. Mvme172 Features Summary21................................................................................................................................................................
Requirements22................................................................................................................................................................
Block Diagrams23................................................................................................................................................................
Functional Description23................................................................................................................................................................
No-vmebus-interface Option23................................................................................................................................................................
Figure 1-1. 200/300-series Mvme172 Block Diagram24................................................................................................................................................................
Figure 1-2. 400/500-series Mvme172 Block Diagram25................................................................................................................................................................
Table 1-2. Redundant Functions In The Vmechip2 And Mc2 Chip26................................................................................................................................................................
Vmebus Interface And Vmechip227................................................................................................................................................................
Memory Maps27................................................................................................................................................................
Local Bus Memory Map27................................................................................................................................................................
Normal Address Range27................................................................................................................................................................
Table 1-3. 200/300-series Mvme172 Local Bus Memory Map28................................................................................................................................................................
Table 1-4. 400/500-series Mvme172 Local Bus Memory Map30................................................................................................................................................................
Table 1-5. 200/300-series Mvme172 Local I/o Devices Memory Map32................................................................................................................................................................
Table 1-6. 400/500-series Mvme172 Local I/o Devices Memory Map36................................................................................................................................................................
Detailed I/o Memory Maps39................................................................................................................................................................
Table 1-7. Vmechip2 Memory Map (sheet 1 Of 3)40................................................................................................................................................................
Table 1-8. Mc2 Chip Register Map45................................................................................................................................................................
Table 1-9. Ip2 Chip Overall Memory Map46................................................................................................................................................................
Table 1-10. Ip2 Chip Memory Map - Control And Status Registers47................................................................................................................................................................
Table 1-11. Mcecc Internal Register Memory Map53................................................................................................................................................................
Table 1-12. Z85230 Scc Register Addresses55................................................................................................................................................................
Table 1-13. 82596ca Ethernet Lan Memory Map56................................................................................................................................................................
Table 1-14. 53c710 Scsi Memory Map57................................................................................................................................................................
Bbram/tod Clock Memory Map58................................................................................................................................................................
Table 1-15. Mk48t58 Bbram/tod Clock Memory Map58................................................................................................................................................................
Table 1-16. Bbram Configuration Area Memory Map59................................................................................................................................................................
Table 1-17. Tod Clock Memory Map60................................................................................................................................................................
Interrupt Acknowledge Map64................................................................................................................................................................
Vmebus Memory Map64................................................................................................................................................................
Vmebus Accesses To The Local Bus65................................................................................................................................................................
Vmebus Short I/o Memory Map65................................................................................................................................................................
Software Support Considerations65................................................................................................................................................................
Interrupts65................................................................................................................................................................
Cache Coherency66................................................................................................................................................................
Sources Of Local Berr*66................................................................................................................................................................
Local Bus Time-out66................................................................................................................................................................
Vmebus Access Time-out67................................................................................................................................................................
Vmebus Berr*67................................................................................................................................................................
Local Dram Parity Error67................................................................................................................................................................
Vmechip267................................................................................................................................................................
Bus Error Processing67................................................................................................................................................................
Description Of Error Conditions On The Mvme17268................................................................................................................................................................
Mpu Parity Error68................................................................................................................................................................
Mpu Off-board Error69................................................................................................................................................................
Mpu Tea - Cause Unidentified69................................................................................................................................................................
Mpu Local Bus Time-out69................................................................................................................................................................
Dmac Vmebus Error70................................................................................................................................................................
Dmac Parity Error70................................................................................................................................................................
Dmac Off-board Error71................................................................................................................................................................
Dmac Lto Error71................................................................................................................................................................
Dmac Tea - Cause Unidentified72................................................................................................................................................................
Lan Parity Error72................................................................................................................................................................
Lan Off-board Error73................................................................................................................................................................
Lan Lto Error73................................................................................................................................................................
Scsi Parity Error74................................................................................................................................................................
Scsi Off-board Error74................................................................................................................................................................
Scsi Lto Error74................................................................................................................................................................
Example Of The Proper Use Of Bus Timers75................................................................................................................................................................
Mvme172 Mc68060 Indivisible Cycles76................................................................................................................................................................
Illegal Access To Ip Modules From External Vmebus Masters77................................................................................................................................................................
Summary Of Major Features79................................................................................................................................................................
Functional Blocks82................................................................................................................................................................
Local Bus To Vmebus Interface82................................................................................................................................................................
Figure 2-1. Vmechip2 Block Diagram83................................................................................................................................................................
Local Bus To Vmebus Requester85................................................................................................................................................................
Vmebus To Local Bus Interface87................................................................................................................................................................
Local Bus To Vmebus Dma Controller88................................................................................................................................................................
No Address Increment Dma Transfers90................................................................................................................................................................
Dmac Vmebus Requester91................................................................................................................................................................
Tick And Watchdog Timers92................................................................................................................................................................
Prescaler92................................................................................................................................................................
Tick Timers93................................................................................................................................................................
Watchdog Timer93................................................................................................................................................................
Vmebus Interrupter94................................................................................................................................................................
Vmebus System Controller95................................................................................................................................................................
Arbiter95................................................................................................................................................................
Iack Daisy-chain Driver95................................................................................................................................................................
Bus Timer95................................................................................................................................................................
Reset Driver96................................................................................................................................................................
Local Bus Interrupter And Interrupt Handler96................................................................................................................................................................
Global Control And Status Registers98................................................................................................................................................................
Lcsr Programming Model98................................................................................................................................................................
Table 2-1. Vmechip2 Memory Map - Lcsr Summary (sheet 1 Of 2)100................................................................................................................................................................
Programming The Vmebus Slave Map Decoders104................................................................................................................................................................
Vmebus Slave Ending Address Register 1106................................................................................................................................................................
Vmebus Slave Starting Address Register 1106................................................................................................................................................................
Vmebus Slave Ending Address Register 2107................................................................................................................................................................
Vmebus Slave Starting Address Register 2107................................................................................................................................................................
Vmebus Slave Address Translation Address Offset Register 1107................................................................................................................................................................
Vmebus Slave Address Translation Select Register 1108................................................................................................................................................................
Vmebus Slave Address Translation Address Offset Register 2109................................................................................................................................................................
Vmebus Slave Address Translation Select Register 2109................................................................................................................................................................
Vmebus Slave Write Post And Snoop Control Register 2110................................................................................................................................................................
Vmebus Slave Address Modifier Select Register 2111................................................................................................................................................................
Vmebus Slave Write Post And Snoop Control Register 1113................................................................................................................................................................
Vmebus Slave Address Modifier Select Register 1114................................................................................................................................................................
Programming The Local Bus To Vmebus Map Decoders115................................................................................................................................................................
Local Bus Slave (vmebus Master) Ending Address Register 1117................................................................................................................................................................
Local Bus Slave (vmebus Master) Starting Address Register 1118................................................................................................................................................................
Local Bus Slave (vmebus Master) Ending Address Register 2118................................................................................................................................................................
Local Bus Slave (vmebus Master) Starting Address Register 2118................................................................................................................................................................
Local Bus Slave (vmebus Master) Ending Address Register 3119................................................................................................................................................................
Local Bus Slave (vmebus Master) Starting Address Register 3119................................................................................................................................................................
Local Bus Slave (vmebus Master) Ending Address Register 4119................................................................................................................................................................
Local Bus Slave (vmebus Master) Starting Address Register 4120................................................................................................................................................................
Local Bus Slave (vmebus Master Address Translation Address Register 4120................................................................................................................................................................
Local Bus Slave (vmebus Master Address Translation Select Register 4120................................................................................................................................................................
Local Bus Slave (vmebus Master) Attribute Register 4121................................................................................................................................................................
Local Bus Slave (vmebus Master) Attribute Register 3122................................................................................................................................................................
Local Bus Slave (vmebus Master) Attribute Register 2123................................................................................................................................................................
Local Bus Slave (vmebus Master) Attribute Register 1124................................................................................................................................................................
Vmebus Slave Gcsr Group Address Register125................................................................................................................................................................
Vmebus Slave Gcsr Board Address Register126................................................................................................................................................................
Local Bus To Vmebus Enable Control Register127................................................................................................................................................................
Local Bus To Vmebus I/o Control Register128................................................................................................................................................................
Rom Control Register129................................................................................................................................................................
Programming The Vmechip2 Dma Controller130................................................................................................................................................................
Dmac Registers131................................................................................................................................................................
Table 2-2. Dmac Command Table Format131................................................................................................................................................................
Prom Decoder, Sram And Dma Control Register132................................................................................................................................................................
Local Bus To Vmebus Requester Control Register133................................................................................................................................................................
Dmac Control Register 1 (bits 0-7)134................................................................................................................................................................
Dmac Control Register 2 (bits 8-15)135................................................................................................................................................................
Dmac Control Register 2 (bits 0-7)137................................................................................................................................................................
Dmac Local Bus Address Counter138................................................................................................................................................................
Dmac Vmebus Address Counter138................................................................................................................................................................
Dmac Byte Counter139................................................................................................................................................................
Table Address Counter139................................................................................................................................................................
Vmebus Interrupter Control Register139................................................................................................................................................................
Vmebus Interrupter Vector Register141................................................................................................................................................................
Mpu Status And Dma Interrupt Count Register141................................................................................................................................................................
Dmac Status Register142................................................................................................................................................................
Programming The Tick And Watchdog Timers143................................................................................................................................................................
Vmebus Arbiter Time-out Control Register143................................................................................................................................................................
Dmac Ton/toff Timers And Vmebus Global Time-out Control Register144................................................................................................................................................................
Vme Access, Local Bus, And Watchdog Time-out Control Register145................................................................................................................................................................
Prescaler Control Register146................................................................................................................................................................
Tick Timer 1 Compare Register147................................................................................................................................................................
Tick Timer 1 Counter147................................................................................................................................................................
Tick Timer 2 Compare Register148................................................................................................................................................................
Tick Timer 2 Counter148................................................................................................................................................................
Board Control Register149................................................................................................................................................................
Watchdog Timer Control Register150................................................................................................................................................................
Tick Timer 2 Control Register151................................................................................................................................................................
Tick Timer 1 Control Register152................................................................................................................................................................
Prescaler Counter152................................................................................................................................................................
Programming The Local Bus Interrupter153................................................................................................................................................................
Table 2-3. Local Bus Interrupter Summary154................................................................................................................................................................
Local Bus Interrupter Status Register (bits 24-31)156................................................................................................................................................................
Local Bus Interrupter Status Register (bits 16-23)157................................................................................................................................................................
Local Bus Interrupter Status Register (bits 8-15)158................................................................................................................................................................
Local Bus Interrupter Status Register (bits 0-7)159................................................................................................................................................................
Local Bus Interrupter Enable Register (bits 24-31)160................................................................................................................................................................
Local Bus Interrupter Enable Register (bits 16-23)161................................................................................................................................................................
Local Bus Interrupter Enable Register (bits 8-15)162................................................................................................................................................................
Local Bus Interrupter Enable Register (bits 0-7)163................................................................................................................................................................
Software Interrupt Set Register (bits 8-15)164................................................................................................................................................................
Interrupt Clear Register (bits 24-31)164................................................................................................................................................................
Interrupt Clear Register (bits 16-23)165................................................................................................................................................................
Interrupt Clear Register (bits 8-15)166................................................................................................................................................................
Interrupt Level Register 1 (bits 24-31)166................................................................................................................................................................
Interrupt Level Register 1 (bits 16-23)167................................................................................................................................................................
Interrupt Level Register 1 (bits 8-15)167................................................................................................................................................................
Interrupt Level Register 1 (bits 0-7)168................................................................................................................................................................
Interrupt Level Register 2 (bits 24-31)168................................................................................................................................................................
Interrupt Level Register 2 (bits 16-23)169................................................................................................................................................................
Interrupt Level Register 2 (bits 8-15)169................................................................................................................................................................
Interrupt Level Register 2 (bits 0-7)170................................................................................................................................................................
Interrupt Level Register 3 (bits 24-31)170................................................................................................................................................................
Interrupt Level Register 3 (bits 16-23)171................................................................................................................................................................
Interrupt Level Register 3 (bits 8-15)171................................................................................................................................................................
Interrupt Level Register 3 (bits 0-7)172................................................................................................................................................................
Interrupt Level Register 4 (bits 24-31)172................................................................................................................................................................
Interrupt Level Register 4 (bits 16-23)173................................................................................................................................................................
Interrupt Level Register 4 (bits 8-15)173................................................................................................................................................................
Interrupt Level Register 4 (bits 0-7)174................................................................................................................................................................
Vector Base Register174................................................................................................................................................................
I/o Control Register 1175................................................................................................................................................................
I/o Control Register 2176................................................................................................................................................................
I/o Control Register 3176................................................................................................................................................................
Miscellaneous Control Register177................................................................................................................................................................
Gcsr Programming Model179................................................................................................................................................................
Programming The Gcsr181................................................................................................................................................................
Table 2-4. Vmechip2 Memory Map (gcsr Summary)182................................................................................................................................................................
Vmechip2 Revision Register183................................................................................................................................................................
Vmechip2 Id Register183................................................................................................................................................................
Vmechip2 Lm/sig Register183................................................................................................................................................................
Vmechip2 Board Status/control Register185................................................................................................................................................................
General Purpose Register 0186................................................................................................................................................................
General Purpose Register 1186................................................................................................................................................................
General Purpose Register 2187................................................................................................................................................................
General Purpose Register 3187................................................................................................................................................................
General Purpose Register 4188................................................................................................................................................................
General Purpose Register 5188................................................................................................................................................................
Mc2 Chip Initialization190................................................................................................................................................................
Flash And Prom Interface190................................................................................................................................................................
Bbram Interface191................................................................................................................................................................
Ca Lan Interface191................................................................................................................................................................
Mpu Port And Mpu Channel Attention191................................................................................................................................................................
Mc68060-bus Master Support For 82596ca192................................................................................................................................................................
Lanc Bus Error192................................................................................................................................................................
Lanc Interrupt193................................................................................................................................................................
C710 Scsi Controller Interface193................................................................................................................................................................
Sram Memory Controller193................................................................................................................................................................
Non-ecc Dram Memory Controller193................................................................................................................................................................
Z85230 Scc Interface194................................................................................................................................................................
Table 3-1. Dram Performance194................................................................................................................................................................
Local Bus Timer196................................................................................................................................................................
Memory Map Of The Mc2 Chip Registers196................................................................................................................................................................
Table 3-2. Mc2 Chip Register Map197................................................................................................................................................................
Programming Model198................................................................................................................................................................
Mc2 Chip Id Register199................................................................................................................................................................
Mc2 Chip Revision Register199................................................................................................................................................................
General Control Register200................................................................................................................................................................
Interrupt Vector Base Register201................................................................................................................................................................
Programming The Tick Timers203................................................................................................................................................................
Tick Timer 1 And 2 Compare And Counter Registers203................................................................................................................................................................
Lsb Prescaler Count Register205................................................................................................................................................................
Prescaler Clock Adjust Register206................................................................................................................................................................
Tick Timer 1 And 2 Control Registers206................................................................................................................................................................
Tick Timer Interrupt Control Registers208................................................................................................................................................................
Dram Parity Error Interrupt Control Register210................................................................................................................................................................
Scc Interrupt Control Register211................................................................................................................................................................
Tick Timer 3 And 4 Control Registers212................................................................................................................................................................
Dram And Sram Memory Controller Registers213................................................................................................................................................................
Dram Space Base Address Register213................................................................................................................................................................
Sram Space Base Address Register214................................................................................................................................................................
Dram Space Size Register214................................................................................................................................................................
Dram/sram Options Register215................................................................................................................................................................
Table 3-4. Dram Size Control Bit Encoding215................................................................................................................................................................
Table 3-5. Dram Size Control Bit Encoding216................................................................................................................................................................
Table 3-6. Sram Size Control Bit Encoding216................................................................................................................................................................
Sram Space Size Register217................................................................................................................................................................
Table 3-7. Sram Size Control Bit Encoding217................................................................................................................................................................
Lanc Error Status Register218................................................................................................................................................................
Ca Lanc Interrupt Control Register219................................................................................................................................................................
Lanc Bus Error Interrupt Control Register220................................................................................................................................................................
Scsi Error Status Register221................................................................................................................................................................
General Purpose Inputs Register221................................................................................................................................................................
Mvme172 Version Register223................................................................................................................................................................
Scsi Interrupt Control Register224................................................................................................................................................................
Tick Timer 3 And 4 Compare And Counter Registers225................................................................................................................................................................
Bus Clock Register226................................................................................................................................................................
Prom Access Time Control Register227................................................................................................................................................................
Flash Access Time Control Register228................................................................................................................................................................
Abort Switch Interrupt Control Register229................................................................................................................................................................
Reset Switch Control Register230................................................................................................................................................................
Access And Watchdog Time Base Select Register232................................................................................................................................................................
Dram Control Register233................................................................................................................................................................
Mpu Status Register234................................................................................................................................................................
Bit Prescaler Count Register236................................................................................................................................................................
General Description238................................................................................................................................................................
Local Bus To Industrypack Dma Controllers239................................................................................................................................................................
Clocking Environments And Performance241................................................................................................................................................................
Table 4-1. Ip2 Chip Clock Cycles242................................................................................................................................................................
Programmable Clock243................................................................................................................................................................
Error Reporting243................................................................................................................................................................
Error Reporting As A Local Bus Slave243................................................................................................................................................................
Error Reporting As A Local Bus Master243................................................................................................................................................................
Industrypack Error Reporting244................................................................................................................................................................
Overall Memory Map245................................................................................................................................................................
Table 4-2. Ip2 Chip Overall Memory Map245................................................................................................................................................................
Table 4-3. Ip2 Chip Memory Map - Control And Status Registers247................................................................................................................................................................
Chip Id Register253................................................................................................................................................................
Chip Revision Register253................................................................................................................................................................
Ip_a, Ip_b, Ip_c, Ip_d Memory Base Address Registers255................................................................................................................................................................
Ip_a Or Double Size Ip_ab Memory Base Address Registers256................................................................................................................................................................
Ip_b Memory Base Address Registers256................................................................................................................................................................
Ip_c Or Double Size Ip_cd Memory Base Address Registers257................................................................................................................................................................
Ip_d Memory Base Address Registers257................................................................................................................................................................
Ip_a, Ip_b, Ip_c, Ip_d Memory Size Registers257................................................................................................................................................................
Ip_a, Ip_b, Ip_c, And Ip_d; Irq0 And Irq1 Interrupt Control Registers259................................................................................................................................................................
Ip_a, Ip_b, Ip_c, And Ip_d; General Control Registers260................................................................................................................................................................
Ip Clock Register264................................................................................................................................................................
Dma Arbitration Control Register265................................................................................................................................................................
Ip Reset Register266................................................................................................................................................................
Programming The Dma Controllers267................................................................................................................................................................
Dma Enable Function269................................................................................................................................................................
Dma Control And Status Register Set Definition269................................................................................................................................................................
Programming The Programmable Clock279................................................................................................................................................................
Local Bus To Industrypack Addressing282................................................................................................................................................................
Bit Memory Space282................................................................................................................................................................
Ip_a I/o Space285................................................................................................................................................................
Ip_ab I/o Space286................................................................................................................................................................
Ip_a Id Space287................................................................................................................................................................
Ip To Local Bus Data Routing288................................................................................................................................................................
Memory Space Accesses288................................................................................................................................................................
I/o And Id Space Accesses290................................................................................................................................................................
Features291................................................................................................................................................................
Performance292................................................................................................................................................................
Table 5-1. Mcecc Specifications293................................................................................................................................................................
Cycle Types294................................................................................................................................................................
Single Bit Error (cycle Type = Burst Read Or Non-burst Read)295................................................................................................................................................................
Double Bit Error (cycle Type = Burst Read Or Non-burst Read)295................................................................................................................................................................
Triple (or Greater) Bit Error Cycle Type = Burst Read Or Non-burst Read)296................................................................................................................................................................
Cycle Type = Burst Write296................................................................................................................................................................
Single Bit Error (cycle Type = Non-burst Write)296................................................................................................................................................................
Double Bit Error (cycle Type = Non-burst Write)296................................................................................................................................................................
Triple (or Greater) Bit Error (cycle Type = Non-burst Write)296................................................................................................................................................................
Single Bit Error (cycle Type = Scrub)296................................................................................................................................................................
Double Bit Error (cycle Type = Scrub)297................................................................................................................................................................
Triple (or Greater) Bit Error (cycle Type = Scrub)297................................................................................................................................................................
Error Logging297................................................................................................................................................................
Scrub297................................................................................................................................................................
Refresh298................................................................................................................................................................
Arbitration298................................................................................................................................................................
Chip Defaults298................................................................................................................................................................
Table 5-2. Mcecc Internal Register Memory Map, Part 1300................................................................................................................................................................
Memory Configuration Register305................................................................................................................................................................
Dummy Register 0306................................................................................................................................................................
Dummy Register 1307................................................................................................................................................................
Base Address Register307................................................................................................................................................................
Bclk Frequency Register310................................................................................................................................................................
Data Control Register311................................................................................................................................................................
Scrub Control Register313................................................................................................................................................................
Scrub Period Register Bits 15-8314................................................................................................................................................................
Scrub Period Register Bits 7-0314................................................................................................................................................................
Chip Prescaler Counter315................................................................................................................................................................
Scrub Time On/time Off Register315................................................................................................................................................................
Scrub Prescaler Counter (bits 21-16)317................................................................................................................................................................
Scrub Prescaler Counter (bits 15-8)318................................................................................................................................................................
Scrub Prescaler Counter (bits 7-0)318................................................................................................................................................................
Scrub Timer Counter (bits 15-8)318................................................................................................................................................................
Scrub Timer Counter (bits 7-0)319................................................................................................................................................................
Scrub Address Counter (bits 26-24)319................................................................................................................................................................
Scrub Address Counter (bits 23-16)320................................................................................................................................................................
Scrub Address Counter (bits 15-8)320................................................................................................................................................................
Scrub Address Counter (bits 7-4)321................................................................................................................................................................
Error Logger Register321................................................................................................................................................................
Error Address (bits 31-24)322................................................................................................................................................................
Error Address (bits 23-16)323................................................................................................................................................................
Error Address Bits (15-8)323................................................................................................................................................................
Error Address Bits (7-4)323................................................................................................................................................................
Error Syndrome Register324................................................................................................................................................................
Defaults Register 1324................................................................................................................................................................
Defaults Register 2326................................................................................................................................................................
Initialization327................................................................................................................................................................
Syndrome Decode329................................................................................................................................................................
Motorola Computer Group Documents333................................................................................................................................................................
Table A-1. Motorola Computer Group Documents333................................................................................................................................................................
Literature Updates334................................................................................................................................................................
Manufacturers' Documents334................................................................................................................................................................
Table A-2. Manufacturers' Documents334................................................................................................................................................................
Vmechip2 Tick Timer 1 Periodic Interrupt Example337................................................................................................................................................................

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