Interrupt Level Register 2 (Bits 16-23); Interrupt Level Register 2 (Bits 8-15) - Motorola MVME172 Programmer's Reference Manual

Vme embedded controller
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Interrupt Level Register 2 (bits 16-23)

ADR/SIZ
BIT
23
NAME
OPER
RESET
This register is used to define the level of the GCSR SIG2 interrupt and the
GCSR SIG3 interrupt.
SIG2 LEVEL These bits define the level of the GCSR SIG2 interrupt.
SIG3 LEVEL These bits define the level of the GCSR SIG3 interrupt.

Interrupt Level Register 2 (bits 8-15)

ADR/SIZ
BIT
15
NAME
OPER
RESET
This register is used to define the level of the GCSR SIG0 interrupt and the
GCSR SIG1 interrupt.
SIG0 LEVEL These bits define the level of the GCSR SIG0 interrupt.
SIG1 LEVEL These bits define the level of the GCSR SIG1 interrupt.
http://www.mcg.mot.com/literature
$FFF4007C (8 bits [6 used] of 32)
22
21
20
SIG3 LEVEL
R/W
0 PSL
$FFF4007C (8 bits [6 used] of 32)
14
13
12
SIG1 LEVEL
R/W
0 PSL
LCSR Programming Model
19
18
17
SIG2 LEVEL
R/W
0 PSL
11
10
9
SIG0 LEVEL
R/W
0 PSL
2
16
8
2-91

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