Table 2-4. Parallel JTAG Interface Connector Description
2.6 External Interrupt
One on-board push-button switch is provided for external interrupt generation, as shown
in
Figure
2-5. S1 allows the user to generate a hardware interrupt for signal line IRQA.
This switch allows the user to generate interrupts for his user-specific programs.
Figure 2-5. Block Diagram of the User Interrupt Interface
2-8
Pin #
Signal
9
PORT_VCC
10
NC
11
PORT_TDO
12
NC
13
PORT_CONNECT
S1
0.1µF
DSP56F801EVM Hardware User's Manual
P2
Pin #
22
23
24
25
+3.3V
DSP56F801
10K
IRQA
Signal
GND
GND
GND
GND