Table of Contents
Advertisement
Programming the GCSR
A complete description of the GCSR is provided in the following tables.
Each register definition includes a table with five lines.
http://www.mcg.mot.com/literature
Line 1 is the base address of the register as viewed from the local
bus and as viewed from the VMEbus, and the number of bits defined
in the table.
Line 2 shows the bits defined by this table.
Line 3 defines the name of the register or the name of the bits in the
register.
Line 4 defines the operations possible on the register bits as follows:
R
This bit is a read-only status bit.
R/W
This bit is readable and writable.
S/R
Writing a one to this bit sets it. Reading it returns its current
status.
Line 5 defines the state of the bit following a reset as defined below:
P
This bit is affected by power-up reset.
S
The bit is affected by SYSRESET.
L
The bit is affected by local bus reset.
X
The bit is not affected by reset.
GCSR Programming Model
2-103
2
Advertisement
Table of Contents
