Motorola MVME172 Programmer's Reference Manual page 51

Table 1-10. IP2 Chip Memory Map - Control and Status Registers
Register Register
Offset Name
DMAC for IndustryPack c, request 0. This register set is referred to as DMACc in the text.
$50 DMA_c
STATUS
$51 DMA_c INT
CTRL
$52 DMA ENABLE
$53 RESERVED
$54 DMA_c CON- DHALT
TROL 1
$55 DMA_c CON- INTE
TROL 2
$56 RESERVED
$57 RESERVED
$58 DMA_c LB LBA31
ADDR
$59 DMA_c LB LBA23
ADDR
$5A DMA_c LB LBA15
ADDR
$5B DMA_c LB LBA7
ADDR
$5C DMA_c IP
ADDR
$5D DMA_c IP IPA23
ADDR
$5E DMA_c IP IPA15
ADDR
$5F DMA_c IP IPA7
ADDR
60 DMA_c BYTE
CNT
$61 DMA_c BYTE BCNT23
CNT
$62 DMA_c BYTE BCNT15
CNT
$63 DMA_c BYTE BCNT7
CNT
$64 DMA_c TBL TA31
ADDR
$65 DMA_c TBL TA23
ADDR
$66 DMA_c TBL TA15
ADDR
$67 DMA_c TBL TA7
ADDR
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(Continued)
D7 D6 D5
0 DLBE 0
0 0 DINT
0 0 0
0 0 0
0 DTBL
0 DMAEI
0 0 0
0 0 0
LBA30 LBA29
LBA22 LBA21
LBA14 LBA13
LBA6 LBA5
0 0 0
IPA22 IPA21
IPA14 IPA13
IPA6 IPA5
0 0 0
BCNT22 BCNT21
BCNT14 BCNT13
BCNT6 BCNT5
TA30 TA29
TA22 TA21
TA14 TA13
TA6 TA5
Register Bit Names
D4 D3 D2
IPEND CHANI TBL
DIEN DICLR DIL2
0 0 0
0 0 0
ADMA WIDTH1 WIDTH0
DMAEO ENTO TOIP
0 0 0
0 0 0
LBA28 LBA27 LBA26
LBA20 LBA19 LBA18
LBA12 LBA11 LBA10
LBA4 LBA3 LBA2
0 0 0
IPA20 IPA19 IPA18
IPA12 IPA11 IPA10
IPA4 IPA3 IPA2
0 0 0
BCNT20 BCNT19 BCNT18
BCNT12 BCNT11 BCNT10
BCNT4 BCNT3 BCNT2
TA28 TA27 TA26
TA20 TA19 TA18
TA12 TA11 TA10
TA4 TA3 TA2
Memory Maps
D1 D0
IPTO DONE
DIL1 DIL0
0 DEN
0 0
0 XXX
0 0
0 0
0 0
LBA25 LBA24
LBA17 LBA16
LBA9 LBA8
LBA1 LBA0
0 0
IPA17 IPA16
IPA9 IPA8
IPA1 IPA0
0 0
BCNT17 BCNT16
BCNT9 BCN8
BCNT1 BCNT0
TA25 TA24
TA17 TA16
TA9 TA8
TA1 TA0
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