Local Bus Interrupter Enable Register (Bits 0-7) - Motorola MVME172 Programmer's Reference Manual

Local Bus Interrupter Enable Register (bits 0-7)

ADR/SIZ
BIT
7
NAME SPARE
OPER R/W
RESET
0 PSL
This is the local bus interrupter enable register. When an enable bit is high,
the corresponding interrupt is enabled. When an enable bit is low, the
corresponding interrupt is disabled. The enable bit does not clear
edge-sensitive interrupts or prevent the flip flop from being set. If
necessary, edge-sensitive interrupters should be cleared to remove any old
interrupts and then enabled.
EIRQ1
EIRQ2
EIRQ3
EIRQ4
EIRQ5
EIRQ6
EIRQ7
SPARE
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$FFF4006C (8 bits of 32)
6 5 4
EIRQ7 EIRQ6 EIRQ5
R/W R/W R/W
0 PSL 0 PSL 0 PSL
Enable VMEbus IRQ1 interrupt.
Enable VMEbus IRQ2 interrupt.
Enable VMEbus IRQ3 interrupt.
Enable VMEbus IRQ4 interrupt.
Enable VMEbus IRQ5 interrupt.
Enable VMEbus IRQ6 interrupt.
Enable VMEbus IRQ7 interrupt.
SPARE.
LCSR Programming Model
3 2 1
EIRIQ4 EIRQ3 EIRQ2
R/W R/W R/W
0 PSL 0 PSL 0 PSL
2
0
EIRQ1
R/W
0 PSL
2-85