Single Channel Source Synchronous Signal Group Routing; Single Channel Dq/Cb To Dqs Mapping - Intel Xeon Design Manual

Processor and e7500/e7501 chipset compatible platform. addendum for embedded applications
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Xeon™ Processor and Intel
Table 13. Channel B Signal Terminations
Signal Name
CB_B[7:0]
DQ_B[63:0]
DQS_B[17:0]
RCVENOUT_B#
CMDCLK_B[3:0]
CMDCLK_B[3:0]#
MA_B[12:0]
BA_B[1:0]
RAS_B#
CAS_B#
WE_B#
CS_B[7:0]#
CKE_B[1:0]
DDRCOMP_B
DRCVO_B
DDRVREF_B[3:0]
3.3.2

Single Channel Source Synchronous Signal Group Routing

The MCH source synchronous signals are divided into groups consisting of data bits (DQ) and
check bits (CB). An associated strobe (DQS) exists for each DQ and CB group, as shown in
Table
14. The MCH supports both x4 and x8 devices, and the number of signals in each data group
depends on the type of devices that are populated. For example, when x4 devices are populated, the
72-bit channel is divided into 18 data groups (16 groups consisting of four data bits each, and two
groups consisting of four check bits each). One DQS is associated with each of these groups (18
total). Likewise, when x8 devices are populated, the 72-bit channel is divided into a total of nine
data groups. In this case, only nine of the 18 strobes are used.
Table 14. Single Channel DQ/CB to DQS Mapping
† In x4 configurations, the high DQS is associated with the high nibble and the low DQS is
associated with the low nibble. In x8 configurations, only the low DQS is used.
32
®
E7500/E7501 Chipset Compatible Platform
Single Channel PCB Recommended Connection
Bidirectional Signal Group
47 Ω +- 1% pullup to DDR Vterm (1.25 V). See
47 Ω +- 1% pullup to DDR Vterm (1.25 V). See
47 Ω +- 1% pullup to DDR Vterm (1.25 V). See
47 Ω pullup to DDR Vterm (1.25 V). See
Output Signal Group
No connect or connect each associated CMDCLK_Bx to
CMDCLK_Bx# through a 120 Ω resistor.
No connect.
Input Signal Group
24.9 Ω +-1% pull-down to Ground. See
Connect to resistor divider network. See
Connect to DDR VREF (1.25 V). See
Data Group
DQ[7:0]
DQ[15:8]
DQ[23:16]
DQ[31:24]
DQ[39:32]
Section 3.3.2
Section 3.3.2
Section 3.3.2
.
Section 3.3.7.1
.
Section 3.3.7.2
.
Section 3.3.7.4
.
Section 3.3.7.3
Associated Strobe
DQS0, DQS9
DQS1, DQS10
DQS2, DQS11
DQS3, DQS12
DQS4, DQS13
Platform Design Guide Addendum
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.
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