Sizing Dram - Motorola MVME2600 Series Reference Manual

Falcon ECC Memory Controller Chip Set
3

Sizing DRAM

3-56
As with DRAM, software should not change control register bits that affect
ROM/Flash while the affected Block is being accessed. This generally
means that the ROM/Flash size, base address, enable, write enable, etc. are
changed only while executing initially in the reset vector area ($FFF00000
- $FFFFFFFF).
The following routine can be used to size DRAM for the Falcon.
Initialize the Falcon control register bits to a known state as follows:
1. Clear the isa_hole bit.
2. Make sure that ram_fref and ram_spd0,ram_spd1 are correct.
3. Set CLK_FREQUENCY to match the operating frequency.
4. Clear the refdis, rwcb bits.
5. Set the derc bit.
6. Clear the scien, tien, sien, and mien bits.
7. Clear the mcken bit.
8. Clear the swen and rtest0,rtest1,rtest2 bits.
9. Make sure that ROM/FLASH banks A and B are not enabled to
respond in the range from $00000000 to $40000000.
10. Make sure that no other devices respond in the range from
$00000000 to $40000000.
For each block:
1. Set the block's base address to $00000000.
2. Enable the block and make sure that the other three blocks are
disabled.
3. Set the block's size control bits. Start with the largest possible
(1024MB).