Global Configuration Register - Motorola MVME2600 Series Reference Manual
Mvme2600/2700 series single board computer
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Also See for MVME2600 Series:
- Installation and use manual (198 pages) ,
- Installation and use manual (20 pages) ,
- Programmer's reference manual (20 pages)
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Raven PCI Host Bridge & Multi-Processor Interrupt Controller Chip
Global Configuration Register
2
Offset
Bit
3
1
Name
Operation
Reset
2-66
3
2
2
2
2
2
2
2
2
2
0
9
8
7
6
5
4
3
2
1
GLOBAL CONFIGURATION
R
$00
R
RESET CONTROLLER. Writing a one to this bit forces
the controller logic to be reset. This bit is cleared
automatically when the reset sequence is complete. While
this bit is set, the values of all other register are undefined.
M
CASCADE MODE. Allows cascading of an external
8259 pair connected to the first interrupt source input pin
(0). In the pass through mode, interrupt source 0 is passed
directly through to the processor 0 INT pin. MPIC is
essentially disabled. In the mixed mode, 8259 interrupts
are delivered using the priority and distribution
mechanism of MPIC. The Vector/Priority and Destination
registers for interrupt source 0 are used to control the
delivery mode for all 8259 generated interrupt sources.
$01020
2
1
1
1
1
1
1
1
1
1
0
9
8
7
6
5
4
3
2
1
R
R
$00
$00
M
MODE
0
Pass Through
1
Mixed
1
0 9 8 7 6 5 4 3 2 1 0
R
$00
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