Motorola MVME2600 Series Reference Manual page 14

List of Figures
Figure 1-1. MVME2600 Series System Block Diagram ...........................................1-6
Figure 1-2. VMEbus Master Mapping.....................................................................1-22
Figure 1-3. VMEbus Slave Mapping .......................................................................1-24
Figure 2-1. Raven Block Diagram .............................................................................2-4
Figure 2-2. PCI Spread I/O Cycle Mapping ............................................................2-14
Figure 2-3. Big to Little Endian Data Swap ............................................................2-17
Figure 2-4. RavenMPIC Block Diagram .................................................................2-57
Figure 3-1. Falcon Pair Used with DRAM in a System ............................................3-3
Figure 3-2. Falcon Internal Data Paths (Simplified)..................................................3-4
Figure 3-3. Overall DRAM Connections...................................................................3-5
Figure 3-4. Data Path for Reads from the Falcon Internal CSRs.............................3-24
Figure 3-5. Data Path for Writes to the Falcon Internal CSRs.................................3-25
Figure 3-6. Memory Map for Byte Reads to the CSR .............................................3-26
Figure 3-7. Memory Map for Byte Writes to the Internal Register Set and
Test SRAM...............................................................................................................3-27
Figure 3-8. Memory Map for 4-Byte Reads to the CSR..........................................3-28
Figure 3-9. Memory Map for 4-Byte Writes to the Internal Register Set and
Test SRAM...............................................................................................................3-28
Figure 3-10. PowerPC Data to DRAM Data Correspondence.................................3-62
Figure 4-1. Architectural Diagram for the Universe..................................................4-3
Figure 4-2. UCSR Access Mechanisms.....................................................................4-8
Figure 5-1. MVME2600/2700 Series Interrupt Architecture.....................................5-2
Figure 5-2. PIB Interrupt Handler Block Diagram ....................................................5-5
Figure 5-3. Big-Endian Mode ..................................................................................5-12
Figure 5-4. Little-Endian Mode ...............................................................................5-13
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