Raven Interrupt Controller Implementation
architecture should recommend that, if the task priority register is not
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implemented with the processor, the task priority register should be
updated only when the processor enter or exits an idle state.
Only when the task priority register is integrated within the processor,
(such that it can be accessed as quickly as the MSRee bit, for example),
should the architecture require the task priority register to be updated
synchronously with instruction execution.
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