System Configuration Register (Syscr) - Motorola MVME2600 Series Reference Manual

Mvme2600/2700 series single board computer
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Board Description and Memory Maps
1

System Configuration Register (SYSCR)

REG
BIT
SYSID
FIELD
OPER
RESET
1-28
The states of the RD[0:31] DRAM data pins, which have weak internal
pull-ups, are latched by the upper Falcon chip at a rising edge of the power-
up reset and stored in this System Configuration Register to provide some
information about the system. Configuration is accomplished with external
pull-down resistors. This 32-bit read-only register is defined as follows:
System Configuration Register - $FEF80400
SYSCLK
$FE
X
SYSID
System Identification. This field specifies the type of the
overall system configuration so that the software may
appropriately handle any software visible differences. For
the MVME2600/2700 series, this field returns a value of
$FE.
SYSCLK System Clock Speed. This field relays the system clock
speed and the PCI clock speed information as follows:
SYSCLK Value
0b0000 to 0b1100
0b1101
0b1110
0b1111
SYSXC
System External Cache Size. This field reflects size of the
look-aside cache on the system bus.
SYSXC Value
0b0000 to 0b1011
SYSXC
P0STAT
P1STAT
READ ONLY
X
X
System Clock Speed
Reserved
50MHz
60MHz
66.66MHz
External Look-aside Cache Size
Reserved
X
$F
$F
PCI Clock Speed
Reserved
25MHz
30MHz
33.33MHz

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