Refresh/Scrub; Blocks A And/Or B Present, Blocks C And D Not Present - Motorola MVME2600 Series Reference Manual

Falcon ECC Memory Controller Chip Set
PowerPC 60x A0-A31
3
$X3FFFFF8
$X3FFFFF9
$X3FFFFFA
$X3FFFFFB
$X3FFFFFC
$X3FFFFFD
$X3FFFFFE
$X3FFFFFF

Refresh/Scrub

Blocks A and/or B Present, Blocks C and D Not Present

3-20
ROM/Flash A22-A0
$7FFFFF
$7FFFFF
$7FFFFF
$7FFFFF
$7FFFFF
$7FFFFF
$7FFFFF
$7FFFFF
Refresh/Scrub is done differently based on which DRAM blocks are
populated: (A and/or B) but not (C and D), or (A and/or B) and (C and/or
D).
The Falcon pair performs refresh by doing a burst of four RAS_ cycles
approximately once every 60 s. This increases to once every 30 s when
certain DRAM devices are used. (Controlled by the ram_fref bit in the
status registers.) RAS_ is asserted to both of Blocks A and B during each
of the 4 cycles. Along with RAS_, the Falcon pair also asserts CAS_ with
(OE_ then WE_) to one of the blocks during one of the four cycles. This
forms a read-modify-write which is a scrub cycle to that location.
After each of the 4 cycles, the DRAM row address increments by one.
When it reaches all 1's, it rolls over and starts over at 0. Each time the row
address rolls over, the block that is scrubbed toggles between A and B.
Every second time that the row address rolls over, which of the 4 cycles
that is a scrub changes from 1st to 2nd, from 2nd to 3rd, from 3rd to 4th,
or from 4th to 1st. Every eighth time that the row address rolls over, the
column address increments by one. When the column address reaches all
1's, it rolls over and starts over at 0. Each time the column address rolls
over, the
SC1, SC0 bits in the scrub/refresh register increment by one.
ROM/Flash Device Selected
(Applies only when using two
32-bit Devices)
Upper
Upper
Upper
Upper
Lower
Lower
Lower
Lower