Programming Model; Memory Maps; Processor Memory Maps - Motorola MVME2600 Series Reference Manual

Board Description and Memory Maps
1

Programming Model

Memory Maps

Processor Memory Maps

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The MVME2600/2700 series contains one IEEE1386.1 PCI Mezzanine
Card (PMC) slot. This PMC slot is 64-bit capable and supports both front
and rear I/O. Pins 1 through 30 of the PMC connector J14 are routed to pins
D1 through D30 of the 5-row DIN P2 connector. J14 pin 31 is connected
to P2 pin Z29, and J14 pin 32 is connected to P2 pin Z31.
Additional PCI expansion is supported with a 114-pin Mictor connector.
This connection allows stacking of a carrier board to increase the I/O
capability, such as a dual-PMC carrier board.
The following sections describe the memory maps for the
MVME2600/2700 series.
The Processor memory map is controlled by the Raven ASIC and the
Falcon chipset. The Raven ASIC and the Falcon chipset have flexible
programming Map Decoder registers to customize the system to fit many
different applications.