Single-Beat Reads/Writes; Dram Speeds - Motorola MVME2600 Series Reference Manual

Single-beat Reads/Writes

Single-beat cycles to and from the PowerPC 60x bus do not achieve data
rates as high as do four-beat cycles. The Falcon pair does take advantage
of the PowerPC 60x address pipelining as much as possible for single-beat
accesses.
Single-beat writes are the slowest kind of accesses because they require
that the Falcon pair perform a read cycle then a write cycle to the DRAM
in order to complete. When the Falcon pair can take advantage of address
pipelining, back-to-back single-beat writes take 10 clocks to complete.

DRAM Speeds

The Falcon pair can be configured for 3 different speeds of DRAM: 50ns,
60ns and 70ns. When the Falcon pair is configured for 50ns DRAMs, it
assumes that the devices are Hyper-Page parts. When the Falcon pair is
configured for 70ns DRAMs it assumes that the devices are Page parts.
When the pair is configured for 60ns DRAMs, it allows the devices to be
either Page or Hyper-Page parts. Performance summaries using the
different devices are shown in Tables 3-1, 3-2, and 3-3.
Functional Description
3-7
3