Reset State - Motorola MVME2600 Series Reference Manual

Raven PCI Host Bridge & Multi-Processor Interrupt Controller Chip
2

Reset State

2-80
a. The device driver interrupt service routine associated with this
interrupt vector is invoked.
b. If the interrupt source was not the 8259, the interrupt handler
issues an EOI request for this interrupt vector to the MPIC. If the
interrupt source was the 8259 and any of the nested interrupt
modes of the 8259 are enabled, the interrupt handler issues an
EOI request to the 8259.
Normally, interrupts from ISA devices are connected to the 8259
interrupt controller. ISA devices typically rely on the 8259 Interrupt
Acknowledge to flush buffers between the ISA device and system
memory. If interrupts from ISA devices are directly connected to the
RavenMPIC (bypassing the 8259), the device driver interrupt
service routine must read status from the ISA device to ensure
buffers between the device and system memory are flushed.
After a power-on reset the RavenMPIC state is:
Current task priority for all CPUs set to 15.
All interrupt source priorities set to zero.
All interrupt source mask bits set to a one.
All interrupt source activity bits cleared.
Processor Init Register is cleared.
All counters stopped and interrupts disabled.
Controller mode set to 8259 pass-through.