Timer Destination Registers; External Source Vector/Priority Registers - Motorola MVME2600 Series Reference Manual
Mvme2600/2700 series single board computer
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Also See for MVME2600 Series:
- Installation and use manual (198 pages) ,
- Installation and use manual (20 pages) ,
- Programmer's reference manual (20 pages)
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Raven PCI Host Bridge & Multi-Processor Interrupt Controller Chip
Timer Destination Registers
2
Offset
Bit
3
1
Name
Operation
Reset
External Source Vector/Priority Registers
Offset
Bit
3
1
Name
Operation
Reset
2-72
3
2
2
2
2
2
2
2
2
2
0
9
8
7
6
5
4
3
2
1
R
$00
This register indicates the destinations for this timer's interrupts. Timer
interrupts, operate in the Directed delivery interrupt mode. This register
may specify multiple destinations (multicast delivery).
P1
PROCESSOR 1. The interrupt is directed to processor 1.
P0
PROCESSOR 0. The interrupt is directed to processor 0.
Int Src 2 -> Int Src15 - $10020 -> $101E0
3
2
2
2
2
2
2
2
2
2
0
9
8
7
6
5
4
3
2
1
EXTERNAL SOURCE VECTOR/PRIORITY
R
$000
Timer 0 - $01130
Timer 1 - $01170
Timer 2 - $011B0
Timer 3 - $011F0
2
1
1
1
1
1
1
1
1
1
0
9
8
7
6
5
4
3
2
1
TIMER DESTINATION
R
R
$00
$00
Int Src 0 - $10000
2
1
1
1
1
1
1
1
1
1
0
9
8
7
6
5
4
3
2
1
PRIOR
R/W
R
$0
$00
1
0 9 8 7 6 5 4 3 2 1 0
R
$00
1
0 9 8 7 6 5 4 3 2 1 0
VECTOR
R/W
$00
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