Processor/Memory Domain; Raven's Involvement; Pci Domain; Pci-Scsi - Motorola MVME2600 Series Reference Manual

Programming Details

Processor/Memory Domain

5

Raven's Involvement

PCI Domain

PCI-SCSI

5-14
The MPC604 processor can operate in both big-endian and little-endian
mode. However, it always treats the external processor/memory bus as big-
endian by performing address rearrangement and reordering when
running in little-endian mode.
The MPC registers inside Raven, the registers inside the Falcon chipset,
the DRAM, the ROM/FLASH and the system registers always appear as
big-endian.
Since PCI is little-endian, the Raven performs byte swapping in both
directions (from PCI to memory and from the processor to PCI) to
maintain address invariance when it is programmed to operate in big-
endian mode with the processor and the memory sub-system.
In little-endian mode, it reverse-rearranges the address for PCI-bound
accesses and rearranges the address for memory-bound accesses (from
PCI). In this case, no byte swapping is done.
The PCI bus is inherently little-endian and all devices connected directly
to PCI will operate in little-endian mode, regardless of the mode of
operation in the processor's domain.
SCSI is byte stream oriented with the byte having the lowest address in
memory being the first one to be transferred regardless of the endian mode.
Since address invariance is maintained by the Raven in both little-endian
and big-endian mode, there should be no endian issues for the SCSI data.
Big-endian software must still however be aware of the byte-swapping
effect when accessing the registers of the PCI-SCSI device.