Config_Address - Motorola MVME2600 Series Reference Manual

RAEN
WPEN
WEN
REN
PSOFFx

CONFIG_ADDRESS

The routing of the MPC data bus to and from the CONFIG_ADDRESS
register depends on the endian bit setting. Refer to the sections on Endian
Conversion, and the LEND bit in the GCSR. The following register
diagrams have two additional rows of information. These rows indicate the
source bit positions on the MPC data bus when data is written to this
register. A read from the CONFIG_ADDRESS register will return
contents to these locations. One row defines the source for big endian
operation and the second is for little endian operation. LEND is the little
endian control bit in the GCSR.
The MSADD3, MSOFF3 and MSATT3 are initialized at reset so software
can access PCI configuration address and data space without changing
Raven registers.
Read Ahead Enable. If set, read ahead is enabled for the
corresponding PCI slave.
Write Post Enable. If set, write posting is enabled for the
corresponding PCI slave.
Write Enable. If set, the corresponding PCI slave is
enabled for write transactions.
Read Enable. If set, the corresponding PCI slave is
enabled for read transactions.
PCI Slave Offset. This register contains a 16-bit offset
that is added to the upper 16 bits of the PCI address to
determine the MPC address used for transfers from PCI to
the MPC bus. This offset allows MPC resources to reside
at addresses that would not normally be visible from PCI.
Registers
2
2-49