Motorola MVME2600 Series Reference Manual page 144

Raven Interrupt Controller Implementation
There is one Task Priority Register per processor. Priority levels from 0
2
(lowest) to 15 (highest) are supported. Setting the Task Priority Register to
15 masks all interrupts to this processor. Hardware will set the task register
to $F when it is reset or when the Init bit associated with this processor is
written to a one.
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