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Motorola MVME197LE User Manual

Motorola single board computer user's manual
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MVME197LE
Single Board Computer
User's Manual
(MVME197LE/D2)

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Summary of Contents for Motorola MVME197LE

  • Page 1 MVME197LE Single Board Computer User’s Manual (MVME197LE/D2)
  • Page 2 Motorola, Inc. assumes no liability resulting from any omissions in this document, or from the use of the information obtained therein. Motorola reserves the right to revise this document and to make changes from time to time in the content hereof without obligation of Motorola to notify any person of such revision or changes.
  • Page 3 This document provides general information, hardware preparation and installation instructions, operating instructions, and a functional description for the MVME197LE Single Board Computer. This document is intended for anyone who wants to design OEM systems, supply additional capability to an existing compatible system, or work in a lab environment for experimental purposes.
  • Page 4 Data and address sizes are defined as follows: A byte is eight bits, numbered 0 through 7, with bit 0 being the least significant. A two-byte is 16 bits, numbered 0 through 15, with bit 0 being the least significant. For the MVME197series and other RISC modules, this is called a half-word.

  • Page 5: Related Documentation

    The following publications are applicable to the MVME197LE module and may provide additional helpful information. If not shipped with this product, they may be purchased by contacting your Motorola sales office. Document Title MVME197LE, MVME197DP, and MVME197SP Single Board Computers Programmer’s Reference Guide MVME197BUG 197Bug Debugging Package User’s Manual...
  • Page 6 Intel i82596 Ethernet Controller User’s Manual Cirrus Logic CD2401 Serial Controller User’s Manual SGS-Thompson MK48T08 NVRAM/TOD Clock Data Sheet The following non-Motorola publications may also be of interest and may be obtained from the sources indicated. The VMEbus Specification is contained in ANSI/IEEE Standard 1014-1987.
  • Page 7 The computer programs stored in the Read Only Memory of this device contain material copyrighted by Motorola Inc., first published 1991, and may be used only under license such as the License for Computer Programs (Article 14) contained in Motorola’s Terms and Conditions of Sale, Rev. 1/79.

  • Page 8: Safety Summary

    DO NOT SUBSTITUTE PARTS OR MODIFY EQUIPMENT. Because of the danger of introducing additional hazards, do not install substitute parts or perform any unauthorized modification of the equipment. Contact your local Motorola representative for service and repair to ensure that safety features are maintained.

  • Page 9: Table Of Contents

    Configuration Switch S1: System Controller Enable Function (S1-9)...2-4 Configuration Switch S6: Serial Port 4 Clock Select (S6-1, S6-2) ...2-5 Connectors ...2-5 Installation Instructions...2-5 MVME197LE Module Installation...2-6 System Considerations...2-7 CHAPTER 3 OPERATING INSTRUCTIONS Introduction ...3-1 Controls and Indicators...3-1 ABORT Switch S2...3-1 RESET Switch S3 ...3-1...
  • Page 10 Software Initialization ...3-21 Multi-MPU Programming Considerations ...3-21 Local Reset Operation ...3-21 CHAPTER 4 FUNCTIONAL DESCRIPTION Introduction ...4-1 MVME197LE Functional Description ...4-1 Data Bus Structure...4-1 MC88110 MPU ...4-1 BOOT ROM ...4-3 FLASH Memory...4-3 Onboard DRAM...4-3 Battery Backup RAM and Clock ...4-3 VMEbus Interface ...4-4...
  • Page 11 List of Figures Figure 2-1. MVME197LE Switches, Connectors, and LED Indicators Location Diagram...2-2 Figure 4-1. MVME197LE Block Diagram...4-2 Figure A-1. Middle-of-the-Road EIA-232-D Configuration...A-5 Figure A-2. Minimum EIA-232-D Connection...A-6...
  • Page 13 List of Tables Table 1-1. MVME197LE Specifications...1-3 Table 3-1. Processor Bus Memory Map ...3-3 Table 3-2. Local Devices Memory Map ...3-4 Table 3-3. BusSwitch Register Memory Map ...3-6 Table 3-4. ECDM CSR Register Memory Map ...3-7 Table 3-5. DCAM (I C) Register Memory Map...3-8...

  • Page 15: General Information

    The BusSwitch ASIC provides an interface between the processor bus (MC88110 bus) and the local peripheral bus (MC68040 compatible bus). Refer to the MVME197LE block diagram (Figure 1-1). It provides bus arbitration for the MC88110 bus and serves as a seven level interrupt handler. It has programmable map decoders for both busses, as well as write post buffers on each, two tick timers, and four 32-bit general purpose registers.

  • Page 16: Features

    The ECDM (Error Correction and Data Multiplexer) ASIC multiplexes between four data paths on the DRAM array. Since the device handles 16 bits, four such devices are required on the MVME197LE to accommodate the 64-bit data bus of the MC88110 microprocessor. Single-bit error correction and double-bit detection is performed in the ECDM.

  • Page 17: Specifications

    – DMA for fast local memory - VMEbus transfers (A16/A24/A32, D16/D32 BLT (D16/D32/D64)) Specifications The specifications for the MVME197LE are listed in Table 1-1. Table 1-1. MVME197LE Specifications Characteristics Power requirements +5 Vdc ( 2.5%), 4 A (typical), 5 A (maximum) +12 Vdc ( 2.5%), 100 mA (maximum)

  • Page 18: Cooling Requirements

    J2 connector Cooling Requirements The Motorola MVME197LE VMEmodule is specified, designed, and tested to operate reliably with an incoming air temperature range from 0° to 55° C (32° to 131° F) with forced air cooling at a velocity typically achievable by using a 100 CFM axial fan.

  • Page 19: Fcc Compliance

    CFM of the air mover, which determine the actual volume and speed of air flowing over a module. FCC Compliance The MVME197LE was tested in an FCC-compliant chassis, and meets the requirements for Class A equipment. FCC compliance was achieved under the following conditions: Shielded cables on all external I/O ports.

  • Page 20: Support Information

    Support Information Detailed support information such as connector signal decriptions, the module parts list, and the schematic diagram for the MVME197LE is contained in the SIMVME197LE Single Board Computer Support Information manual. This manual may be obtained free of charge by contacting your local Motorola sales office.

  • Page 21: Hardware Preparation And Installation

    These modifications are made through switch settings as described in the following sections. Many other modifications are done by setting bits in control registers after the MVME197LE has been installed in a system. (The MVME197LE registers are described in the MVME197LE, MVME197DP, and MVME197SP Single Board Computers Programmer’s Reference...
  • Page 22 Hardware Preparation and Installation User’s Manual...

  • Page 23: Location Diagram

    CONFIGURATION SWITCH S1 GENERAL PURPOSE/SCON MODULE CONNECTOR J1 REMOTE RESET/ABORT/LEDS ABORT RESET SWITCH SWITCH MVME197LE Figure 2-1. MVME197LE Switches, Connectors, and LED Indicators Location Diagram VMEbus CONNECTOR P2 1A17 1E17 MEZZANINE CONNECTOR J2 SERIAL PORT 4 CLOCK SELECT 2A17 3A17 2E17...

  • Page 24: Configuration Switches

    Configuration Switches The location of the switches, connectors, and LED indicators on the MVME197LE is illustrated in Figure 2-1. The MVME197LE has been factory tested and is shipped with factory switch settings that are described in the following sections. The MVME197LE operates with its required and factory- installed Debug Monitor, MVME197Bug (197Bug), with these factory switch setting.

  • Page 25: Configuration Switch S1: General Purpose Functions

    The MVME197LE can be the system controller. The system controller function is enabled or disabled by configuring selectable switch segment S1-9. When the MVME197LE is the system controller, the SCON LED is turned ON. The VMEchip2 may be configured as a system controller as illustrated below.

  • Page 26: Configuration Switch S6: Serial Port 4 Clock Select

    Configuration Switch S6: Serial Port 4 Clock Select (S6-1, S6-2) Serial port 4 can be configured to use clock signals provided by the RTXC4 and TRXC4 signal lines. Switch segments S6-1 and S6-2 on the MVME197LE configures serial port 4 to drive or receive TRXC4 and RTXC4, respectively.

  • Page 27: Mvme197Le Module Installation

    Remove the filler panel(s) from the appropriate card slot(s) at the front and rear of the chassis (if the chassis has a rear card cage). The MVME197LE module requires power from both P1 and P2. It may be installed in any double-height unused card slot, if it is not configured as the system controller.

  • Page 28: System Considerations

    ON. System Considerations The MVME197LE needs to draw power from both connectors P1 and P2 of the VMEbus backplane. Connector P2 is also used for the upper 16 bits of data for 32-bit transfers, and for the upper 8 address lines for the extended addressing mode.
  • Page 29 VMEbus. The MVME197LE provides +12 Vdc power to the Ethernet LAN transceiver interface through a 1 amp fuse (F2) located on the MVME197LE module. If the Ethernet transceiver fails to operate, check the fuse. When using the...
  • Page 30 Hardware Preparation and Installation 2-10 User’s Manual...

  • Page 31: Operating Instructions

    SYSRESET* signal if the MVME197LE module is the system controller. The RESET switch (S3) will reset all the onboard devices, with the exception of the DCAM and ECDM, if the MVME197LE module is not the system controller. The VMEchip2 generates the SYSREST* signal. The BusSwitch combines the local reset and the reset switch to generate a local board reset.

  • Page 32: Front Panel Indicators (Ds1-Ds6)

    VMEbus SYSRESET*, or a control bit in the GCSR. Front Panel Indicators (DS1-DS6) The six LEDs on the MVME197LE front panel are: FAIL, SCON, RUN, LAN, VME, and SCSI. The yellow FAIL LED (DS1) is lit when the BRDFAIL signal line is active.

  • Page 33: Table 3-1. Processor Bus Memory Map

    The memory maps of MVME197LE devices are provided in the following tables. Table 3-1 is the entire map from $00000000 to $FFFFFFFF. Many areas of the map are user-programmable, and suggested uses are shown in the table. This is assuming no address translation is used between the processor and local peripheral bus and between the local peripheral bus and VMEbus.

  • Page 34: Table 3-2. Local Devices Memory Map

    For a more detailed memory map refer to the detailed peripheral device memory maps in the MVME197LE, MVME197DP, and MVME197SP Single Board Computers Programmer’s Reference Guide. 2. Address is the physical address going to the device. It is after the BusSwitch translation from the MC88110 address to the device seen address.

  • Page 35: Detailed I/O Memory Maps

    ECDM CSR register, the DCAM (I register, the PCCchip2 register, the printer register, the CD2401 Serial Port register, the Ethernet LAN register, the SCSI Controller register, and the BBRAM/TOD Clock register. MVME197LE/D2 Memory Maps C) register, the VMEchip2...

  • Page 36: Table 3-3. Busswitch Register Memory Map

    Operating Instructions Table 3-3. BusSwitch Register Memory Map BusSwitch Base Address = $FFF00000 Offset CHIPID CHIPREV PSAR1 PSAR3 PTR1 PTR3 SSAR1 SSAR3 STR1 STR3 PAR1 PAR2 BTIMER PADJUST PCOUNT ROMCR ABORT CPINT VECTOR2 VECTOR4 VECTOR6 GCSR IODATA PEAR1 PEAR3 PTSR1 PTSR3 SEAR1 SEAR3...
  • Page 37 Memory Maps MVME197LE/D2...

  • Page 38: Table 3-4. Ecdm Csr Register Memory Map

    Table 3-4. ECDM CSR Register Memory Map Sub-System Memory CSR Base Address = $FFF01000 Offset/Register: ECDM0 ECDM1 ADDR/REGISTER ADDR/REGISTER ADDR/REGISTER ADDR/REGISTER ADDR/REGISTER ADDR/REGISTER ADDR/REGISTER ADDR/REGISTER 00 / MEMCON0 01 / ECDMID0 02 / MEMCON1 08 / SYNSTAT0 09 / ERSTAT0 0A / SYNSTAT1 10 / I2CON0 11 / I2STAT0...

  • Page 39: Table 3-5. Dcam (I 2 C) Register Memory Map

    1F 31 BIT 7 BIT 6 BIT 5 DCAM registers are only accessible/addressable on the DRAM sub-system I the ECDM I C interface. MVME197LE/D2 C) Register Memory Map BIT 4 BIT 3 BIT 2 BIT 1 ID Register Version Register...
  • Page 40 Operating Instructions 3-10 User’s Manual...

  • Page 41: Table 3-6. Vmechip2 Memory Map

    Table 3-6. VMEchip2 Memory Map VMEchip2 LCSR Base Address = $FFF40000 OFFSET: VMEbus SLAVE ENDING ADDRESS 1 VMEbus SLAVE ENDING ADDRESS 2 VMEbus SLAVE ADDRESS TRANSLATION ADDRESS 1 VMEbus SLAVE ADDRESS TRANSLATION ADDRESS 2 (VB) (VB) (VB) (VB) (VB) LOCAL BUS SLAVE ENDING ADDRESS 1 LOCAL BUS SLAVE ENDING ADDRESS 2 LOCAL BUS SLAVE ENDING ADDRESS 3 LOCAL BUS SLAVE ENDING ADDRESS 4...
  • Page 42 Operating Instructions 3-12 User’s Manual...
  • Page 43 Table 3-6. VMEchip2 Memory Map (Continued) VMEchip2 LCSR Base Address = $FFF40000 OFFSET: INTERRUPT VMEbus STAT INTERRUPT VMEbus INTERRUPT VECTOR SIGNAL LEVEL DMAC TIME OFF SCON SYS PURS FAIL FAIL STAT PURS FAIL STAT STAT STAT = Local Bus (LB) = Local Bus Slave = Local Bus to VMEbus (Sheet 2 of 4) ROM0...
  • Page 44 Operating Instructions 3-14 User’s Manual...
  • Page 45 Table 3-6. VMEchip2 Memory Map (Continued) VMEchip2 LCSR Base Address = $FFF40000 OFFSET: IRQ1 DMAC GCSR FAIL FAIL EDGE TIM2 TIM1 IACK SIG3 ACFAIL ABORT SYSFAIL IRQ LEVEL IRQ LEVEL IRQ LEVEL VMEbus DMAC GCSR ACKNOWLEDGE IRQ LEVEL SIG 3 IRQ LEVEL IRQ LEVEL IRQ LEVEL...
  • Page 46 Operating Instructions 3-16 User’s Manual...
  • Page 47 Table 3-6. VMEchip2 Memory Map (Continued) (Sheet 4 of 4) VMEchip2 GCSR Base Address = $FFF40100 CHIP REVISION SIG3 SIG2 SIG1 SIG0 GENERAL PURPOSE CONTROL AND STATUS REGISTER 0 GENERAL PURPOSE CONTROL AND STATUS REGISTER 1 GENERAL PURPOSE CONTROL AND STATUS REGISTER 2 GENERAL PURPOSE CONTROL AND STATUS REGISTER 3 GENERAL PURPOSE CONTROL AND STATUS REGISTER 4 GENERAL PURPOSE CONTROL AND STATUS REGISTER 5...
  • Page 48 Operating Instructions 3-18 User’s Manual...

  • Page 49: Table 3-7. Pccchip2 Memory Map

    Table 3-7. PCCchip2 Memory Map PCCchip2 LCSR Base Address = $FFF42000 OFFSET: CHIP ID PRESCALER COUNT PRESCALER CLOCK ADJUST PLTY E/L* ICLR IRQ LEVEL RTRY SCLR SCC TRANSMIT PIACK SCLR SCSI SCSI SCSI SCSI SCLR PRTR PRTR PRTR PRTR PRTR PRTR ACK PRTR PRTR...

  • Page 50: Table 3-8. Printer Memory Map

    Operating Instructions Printer ACK Interrupt Control Register NAME PLTY Printer FAULT Interrupt Control Register NAME PLTY Printer SEL Interrupt Control Register PLTY NAME Printer PE Interrupt Control Register NAME PLTY Printer BUSY Interrupt Control Register NAME PLTY Printer Input Status Register NAME PINT Printer Port Control Register...

  • Page 51: Table 3-9. Cirrus Logic Cd2401 Serial Port Memory Map

    Channel Option Register 1 Channel Option Register 2 Channel Option Register 3 Channel Option Register 4 Channel Option Register 5 Channel Mode Register This is a 16-bit register. MVME197LE/D2 Memory Maps Base Address Is $FFF45000 Offsets Size (GFRCR) (TFTC) (MEOIR)

  • Page 52: Table 3-10. 82596Ca Ethernet Lan Memory Map

    $FFF46000 $FFF46004 1. Refer to the MPU Port and MPU Channel Attention otes registers in the PCCchip2 chapter of the MVME197LE, MVME197DP, Computers Programmer’s Reference Guide. 2. After reset you must write the System Configuration Pointer to the command registers prior to writing to the CPU Channel Attention register.

  • Page 53: Table 3-11. 53C710 Scsi Memory Map

    Table 3-12. MK48T08 BBRAM, TOD Clock Memory Map Address Range $FFFC0000 $FFFC0FFF $FFFC1000 $FFFC10FF $FFFC1100 $FFFC16F7 $FFFC16F8 $FFFC1EF7 $FFFC1EF8 - $FFFC1FF7 $FFFC1FF8 - $FFFC1FFF MVME197LE/D2 Base Address is $FFF47000 SCNTL1 SCNTL0 SXFER SCID SIDL SFBR SSTAT0 DSTAT CTEST1 CTEST0 CTEST5 CTEST4...

  • Page 54: Table 3-13. Bbram Configuration Area Memory Map

    Operating Instructions Table 3-13. BBRAM Configuration Area Memory Map Address Range $FFFC1EF8 - $FFFC1EFB $FFFC1EFC - $FFFC1F07 $FFFC1F08 $FFFC1F17 $FFFC1F18 $FFFC1F27 $FFFC1F28 $FFFC1F2B $FFFC1F2C - $FFFC1F33 $FFFC1F34 $FFFC1FF6 $FFFC1FF7 Address $FFFC1FF8 $FFFC1FF9 $FFFC1FFA $FFFC1FFB $FFFC1FFC $FFFC1FFD $FFFC1FFE $FFFC1FFF ST = otes 3-24 Description...

  • Page 55: Bbram, Tod Clock Memory Map

    The first area is reserved for user data. The second area is used by Motorola networking software. The third area is used by the SYSTEM V/88 operating system. The fourth area is used by the MVME197 board debugger.

  • Page 56: Vmebus Memory Map

    Additional boards in a set are defined by a structure for that set. For example, for a 32 megabyte, 50 MHz MVME197LE board at revision A, the PWA field contains: (The 12 characters are followed by four blanks.)

  • Page 57: Software Initialization

    Software Initialization Most functions that have been done with switches or jumpers on other modules are done by setting control registers on the MVME197LE. At power- up or reset, the FLASH memory that contains the 197Bug debugging package sets up the default values of many of these registers.
  • Page 58 Operating Instructions Any VMEbus access to the MVME197LE while it is in the reset state is ignored. If a global bus timer is enabled, a bus error is generated. 3-28 User’s Manual...

  • Page 59: Functional Description

    A32/D8/D16/D32 VMEbus master/slave interface, and a VMEbus system controller. Data Bus Structure The local data bus on the MVME197LE module is designed to accommodate the various 8-bit, 16-bit, and 32-bit devices that reside on the module. Refer to the MVME197LE, MVME197DP, and MVME197SP Single Board Computers Programmer’s Reference Guide and to the specific sections of this user’s manual...
  • Page 60 Functional Description User’s Manual...

  • Page 61: Figure 4-1. Mvme197Le Block Diagram

    Address Bus Mezzanine PROCESSOR Port Data Bus BusSwitch Address Address Bus Data Bus 82596CA VMEbus SCSI -II (VMEchip2) NCR53710 Figure 4-1. MVME197LE Block Diagram MUX Address Data RAS, CAS DCAM ECDM (X4) CBus Data LOCAL PERIPHERAL Flash PCCchip2 Memory Memory Array...

  • Page 62: Boot Rom

    Battery Backup RAM and Clock The MK48T08 RAM and clock chip is used on the MVME197LE. This chip provides a time of day clock, oscillator, crystal, power fail detection, memory write protection, 8KB of RAM, and a battery in one 28-pin package. The clock...

  • Page 63: Vmebus Interface

    The local peripheral bus to VMEbus interface, the VMEbus to local peripheral bus interface, and the local-VMEbus DMA controller functions on the MVME197LE are provided by the VMEchip2. The VMEchip2 can also provide the VMEbus system controller functions. Refer to the VMEchip2 chapter in the MVME197LE, MVME197DP, and MVME197SP Single Board Computers Programmer’s Reference Guide for detailed programming information.

  • Page 64: Printer Interface

    Every MVME197LE module is assigned an Ethernet Station Address. This address is $08003E2XXXXX, where XXXXX is the unique 5-nibble number assigned to the board (i.e., every MVME197LE has a different value for XXXXX). The Ethernet Station Address is displayed on a label attached to the VMEbus P2 connector.

  • Page 65: Scsi Interface

    SCSI Termination The system configurer must ensure that the SCSI bus is terminated properly. On the MVME197LE, the terminators are located on the P2 transition board. The +5V power to the SCSI bus termination resistors is provided by the P2 transition board.

  • Page 66: Watchdog Timer

    Functional Description Refer to the VMEchip2, PCCchip2, and BusSwitch chapters in the MVME197LE, MVME197DP, and MVME197SP Single Board Computers Programmer’s Reference Guide for detailed programming information. Watchdog Timer A watchdog timer function is provided in the VMEchip2. When the watchdog timer is enabled, it must be reset by software within the programmed time or it times out.
  • Page 67 (PALINT and IRQ). The BusSwitch may also generate the non-maskable interrupt (NMI) signal to the MPU from the ABORT push- button switch. Refer to the BusSwitch, PCCchip2, and VMEchip2 chapters in the MVME197LE, MVME197DP, and MVME197SP Single Board Computers Programmer’s Reference Guide for more detailed information. MVME197LE/D2...
  • Page 68 Functional Description 4-10 User’s Manual...
  • Page 69 +3 and +15 volts for a high level, and between -3 and -15 volts for a low level. Any attempt to connect units in parallel may result in out of range voltages and is not allowed by the EIA-232-D specifications. MVME197LE/D2A-1...
  • Page 70 EIA-232-D Interconnections Signal Number Mnemonic SIG-GND 9-14 18,19 Table A-1. EIA-232-D Interconnections Signal Name and Description Not used. TRANSMIT DATA - data to be transmitted is furnished on this line to the modem from the terminal. RECEIVE DATA - data which is demodulated from the receive line is presented to the terminal by the modem.
  • Page 71 CARRIER NOT PRESENT to help the user to diagnose failure to communicate. Obviously, if the system is designed properly to use this signal, and it is not connected to a modem, the signal must MVME197LE/D2 EIA-232-D Interconnections Signal Name and Description RING INDICATOR - RI is sent by the modem to the terminal.
  • Page 72 EIA-232-D Interconnections be provided by a pull-up resistor or gate as described before (see Figure A-1). Many modems expect a DTR high signal and issue a DSR. These signals are used by software to help prompt the operator about possible causes of trouble. The DTR signal is used sometimes to disconnect the phone circuit in preparation for another automatic call.

  • Page 73: Table A-1. Eia-232-D Interconnections

    6850 LS08 OPTIONAL HARDWARE TRANSPARENT MODE LS08 6850 -12V +12V -12V Figure A-1. Middle-of-the-Road EIA-232-D Configuration MVME197LE/D2 EIA-232-D Interconnections -12V +12V SIG GND LOGIC SIG GND +12V +12V -12V MODULE CONNECTOR TERMINAL CHASSIS GND CONNECTOR MODEM HOST SYSTEM...

  • Page 74: Figure A-2. Minimum Eia-232-D Connection

    EIA-232-D Interconnections Another subject that needs to be considered is the use of ground pins. There are two pins labeled GND. Pin 7 is the SIGNAL GROUND and must be connected to the distant device to complete the circuit. Pin 1 is the CHASSIS GROUND, but it must be used with care.
  • Page 75 Data Bus Structure 4-1 MVME197LE/D2IN-1 DCAM (I2C) Register Memory Map 3-8 DCAM ASIC 1-2 Detailed I/O Memory Maps 3-5 diagram(s) MVME197LE Block 4-2 MVME197LE Switches, Connectors, and LED Indicators Location DROM (Download ROM) 4-3 ECDM ASIC 1-2 ECDM CSR Register Memory Map 3-7...
  • Page 76 MVME197BUG 197Bug Debugging Package User’s Manual 1-6, 3-20 MVME197Bug debug monitor firmware (197Bug) 1-5 MVME197LE Block Diagram 4-2 MVME197LE Functional Description 4-1 MVME197LE Module Installation 2-6 MVME197LE registers 2-1 MVME197LE Specifications 1-3 MVME712M Transition Module and P2 Adapter Board User’s Manual...
  • Page 77 Relative humidity 1-3 RESET switch (S3) 3-1 SCSI Interface 4-6 SCSI Termination 4-6 Serial Port Interface 4-4 Software-Programmable Hardware Interrupts 4-7 specifications, MVME197LE 1-3 Storage temperature 1-3 Support Information 1-6 switch settings 2-1 switch(es) ABORT (S2) 3-1 Configuration S1 2-3...
  • Page 78 IN-4 Index User’s Manual...

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