Mpc Slave Offset/Attribute (0,1 And 2) Registers - Motorola MVME2600 Series Reference Manual

Mvme2600/2700 series single board computer
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MPC Slave Offset/Attribute (0,1 and 2) Registers

Address
Bit
0 1 2 3 4 5 6 7 8 9
Name
Operation
Reset
MSOFFx MPC Slave Offset. This register contains a 16-bit offset
REN
WEN
WPEN
MEM
MSOFF0/MSATT0 - $FEFF0044
MSOFF1/MSATT1 - $FEFF004C
MSOFF2/MSATT2 - $FEFF0054
1
1
1
1
1
1
0
1
2
3
4
5
MSOFFx
R/W
$0000
that is added to the upper 16 bits of the MPC address to
determine the PCI address used for transfers from the
MPC bus to PCI. This offset allows PCI resources to
reside at addresses that would not normally be visible
from the MPC bus.
Read Enable. If set, the corresponding MPC slave is
enabled for read transactions.
Write Enable. If set, the corresponding MPC slave is
enabled for write transactions.
Write Post Enable. If set, write posting is enabled for the
corresponding MPC slave.
PCI Memory Cycle. If set, the corresponding MPC slave
will generate transfers to or from PCI memory space.
When clear, the corresponding MPC slave will generate
transfers to or from PCI I/O space using the addressing
mode defined by the IOM field.
1
1
1
1
2
2
2
2
2
2
6
7
8
9
0
1
2
3
4
5
R
$00
Registers
2
2
2
2
2
3
3
6
7
8
9
0
1
MSATTx
2-39

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