Motorola MVME2600 Series Reference Manual page 16
Mvme2600/2700 series single board computer
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Also See for MVME2600 Series:
- Installation and use manual (198 pages) ,
- Installation and use manual (20 pages) ,
- Programmer's reference manual (20 pages)
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List of Tables
Table 1-1. MVME2600 Series Features Summary ...................................................1-4
Table 1-2. Default Processor Memory Map ..............................................................1-9
Table 1-3. CHRP Memory Map Example................................................................1-10
Table 1-4. Raven MPC Register Values for CHRP Memory Map...........................1-11
Table 1-5. PREP Memory Map Example.................................................................1-12
Table 1-6. Raven MPC Register Values for PREP Memory Map ...........................1-13
Table 1-7. PCI CHRP Memory Map .......................................................................1-14
Table 1-8. Raven PCI Register Values for CHRP Memory Map.............................1-16
Table 1-9. Universe PCI Register Values for CHRP Memory Map ........................1-16
Table 1-10. PCI PREP Memory Map.......................................................................1-18
Table 1-11. Raven PCI Register Values for PREP Memory Map ............................1-19
Table 1-12. Universe PCI Register Values for PREP Memory Map........................1-20
Table 1-14. VMEbus Slave Map Example...............................................................1-26
Table 1-15. System Register Summary ....................................................................1-27
Table 1-16. Strap Pins Configuration for the PC87308VUL ...................................1-34
Table 1-17. MK48T59/559 Access Registers ..........................................................1-35
Table 1-18. Module Configuration and Status Registers .........................................1-36
Table 1-19. VME Registers......................................................................................1-40
Table 1-20. Z8536/Z85230 Access Registers ..........................................................1-45
Table 1-21. Z8536 CIO Port Pins Assignment .......................................................1-46
Table 1-22. Interpretation of MID3-MID0 ..............................................................1-48
Table 1-23. PIB DMA Channel Assignments ..........................................................1-49
Table 2-1. CHRP Compliant Memory Map ...............................................................2-7
Table 2-2. MPC Transfer Types ...............................................................................2-10
Table 2-3. PCI Command Codes..............................................................................2-13
Table 2-4. Address Modification for Little Endian Transfers..................................2-18
Table 2-5. Raven MPC Register Map .....................................................................2-22
Table 2-6. Raven PCI Configuration Register Map.................................................2-42
Table 2-7. Raven PCI I/O Register Map ..................................................................2-42
Table 2-8. RavenMPIC Register Map......................................................................2-61
70ns Page Devices .....................................................................................................3-8
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