Registers; Mpc Registers; Table 2-5. Raven Mpc Register Map - Motorola MVME2600 Series Reference Manual

Mvme2600/2700 series single board computer
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Raven PCI Host Bridge & Multi-Processor Interrupt Controller Chip
2Raven PCI Host Bridge & Multi-Processor Interrupt Controller Chip
2

Registers

MPC Registers

Bit --->
0 1 2 3 4 5 6 7 8 9
$FEFF0000
$FEFF0004
$FEFF0008
$FEFF000C
$FEFF0010
$FEFF0014
$FEFF0018
$FEFF001C
$FEFF0020
2-22
This chapter provides a detailed description of all Raven registers. These
registers are broken into two groups: the MPC Registers and the PCI
Configuration Registers. The MPC Registers are accessible only from the
MPC bus using any valid transfer size. The PCI Configuration Registers
reside in PCI configuration space. They are accessible from the MPC bus
through the Raven. The MPC Registers are described first; the PCI
Configuration Registers are described next.
The following conventions are used in the Raven register charts:
R
Read Only field.
R/W
Read/Write field.
S
Writing a ONE to this field sets this field.
C
Writing a ONE to this field clears this field.
The Raven MPC register map is shown in Table 2-5.

Table 2-5. Raven MPC Register Map

1
0
VENID
REVID
GCSR
1
1
1
1
1
1
1
1
1
2
1
2
3
4
5
6
7
8
9
0
2
2
2
2
2
2
2
2
2
3
1
2
3
4
5
6
7
8
9
0
DEVID
FEAT
MARB
PADJ
MEREN
3
1

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