Table 9-3. Scpi Status Byte - Ametek ASTDC60D1C-E00 Programming Manual

SCPI Status Implementation
Figure 9-3.
For example, if the SRE register is set to 0x02 (Protection Event Flag), when the
Power Supply has a fault event, Status Byte register will contain 0x42 (RQS and
Protection Event Flag) and the SRQ (SRQ is supported only on GPIB) line will be
asserted to indicate a request for service. See Figure 9-3 and Section 11 SCPI
Status Implementation for further information.
Bit Hex Value Description
0
1
2
3
4
5
6
7
9-6
Table 9–3. SCPI Status Byte
0x01 Not used.
Protection Event Status flag. Indicates the selected protection
0x02
event occurred.
Error/event queue message available.
0x04
error/event is entered in the System Error Queue. It is read
using the SYSTem:ERRor? query.
Questionable Status flag. Indicates the quality of the current
0x08
data being acquired. This bit is not used.
Message available (MAV). Indicates a message is available to
0x10
read (Only applicable to GPIB Interface).
Standard Event Status Register (ESR). Summary bit for the
0x20
ESR. Set when any of the ESR bits are set and cleared when
the ESR is read.
Request Service flag (RQS) for serial polling or Master
0x40
Summary Status (MSS) in response to *STB? If service
requests are enabled (with the *SRE command), this bit
represents the RQS and will be sent in response to a serial poll,
then cleared. The MSS bit indicates that the device has at least
one reason to request service. Even though the device sends
the MSS bit in response to a status query (*STB?), it is not sent
in response to a serial poll. It is not considered part of the IEEE-
488.1 Status Byte.
Operation Status flag. Indicates the current operational state of
0x80
the unit. This bit is not used.
Asterion DC Series Programming
Set when any
M330461-01 Rev A