Settings Of Port Mode Register And Output Latch When Using Alternate Function - NEC mPD78F0730 Preliminary User's Manual

4.5 Settings of Port Mode Register and Output Latch When Using Alternate Function

To use the alternate function of a port pin, set the port mode register and output latch as shown in Table 4-5.
Table 4-5. Settings of Port Mode Register and Output Latch When Using Alternate Function
Pin Name
P00
P01
P10
P11
P12
P13
P14
P16
P17
P30 to P32
P33
P120
P121
P122
Note When using the P121 and P122 pins to connect a resonator for the main system clock (X1, X2) or to input
an external clock for the main system clock (EXCLK), the X1 oscillation mode or external clock input mode
must be set by using the clock operation mode select register (OSCCTL) (for details, see 5.3 (1) Clock
operation mode select register (OSCCTL). The reset value of OSCCTL is 00H (all of the P121 and P122
are I/O port pins). At this time, setting of PM121, PM122, P121, and P122 is not necessary.
Remarks 1. ×:
2. The X1, X2, P31, and P32 pins of the
80
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CHAPTER 4 PORT FUNCTIONS
Alternate Function
Function Name
TI000
TI010
TO00
SCK10
SI10
SO10
TxD6
RxD6
TOH1
TI50
TO50
INTP1 to INTP3
TI51
TO51
INTP0
Note
X1
Note
X2
Note
EXCLK
Don't care
PM××: Port mode register
P××: Port output latch
(OCD0A, OCD0B, OCD1A, OCD1B) when the on-chip debug function is used. For details, see
CHAPTER 22 ON-CHIP DEBUG FUNCTION.
Preliminary User's Manual U19014EJ1V0UD
I/O
Input
Input
Output
Input
Output
Input
Output
Output
Input
Output
Input
Output
Input
Input
Output
Input
−
−
Input
µ
PD78F0730 can be used as on-chip debug mode setting pins
PM×× P××
×
1
×
1
0 0
×
1
0 1
×
1
0 0
0 1
×
1
0 0
×
1
0 0
×
1
×
1
0 0
×
1
× ×
× ×
× ×