Using Status Registers
General Status Register Model
Enable Register
Enable registers control the reporting of events (latched conditions) to
the register summary bit. If an enable bit is set to 1, the corresponding
event is included in the logical ORing process that determines the state
of the summary bit. (The summary bit is only set to 1 if one or more
enabled event bits are set to 1.) Summary bits are recorded in the
instrument's status byte. Enable registers are read-write and are cleared
by *CLS (clear status).
Figure 5-2
Flow of Information Within a Register Set
Programmer's Guide
5-5