Memory Interleaving; Independent Memory Subsystems - Sun Microsystems Fire V890 Service Manual

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Memory Interleaving

You can maximize the system's memory bandwidth by taking advantage of its
memory interleaving capabilities. Sun Fire V890 systems support two-way, four-way,
and eight-way memory interleaving. In most cases, higher interleaving factors result
in greater system performance. However, actual performance results may vary
depending on the system application.
The system's interleaving capabilities are summarized as follows:
Memory interleaving is limited to memory within the same CPU/Memory board.
Memory interleaving between CPU/Memory boards is not supported.
Eight-way interleaving occurs automatically when all 16 DIMM slots in a
CPU/Memory board are filled with identical capacity DIMMs (16 identical
DIMMs).
Four-way interleaving occurs automatically between any two DIMM groups that
are configured identically (eight identical capacity DIMMs).
Two-way interleaving occurs automatically in any DIMM group where the DIMM
capacities do not match the capacities used in any other group.

Independent Memory Subsystems

Each Sun Fire V890 CPU/Memory board contains two independent memory
subsystems (one per UltraSPARC IV processor). Memory controller logic
incorporated into the UltraSPARC IV processor allows each processor to control its
own memory subsystem. One processor controls DIMM groups A0 and A1, while
the other processor controls DIMM groups B0 and B1.
The Sun Fire V890 system uses a shared memory architecture. During normal system
operations, the total system memory is shared by all procesors in the system.
However, in the event of a processor failure, the two DIMM groups associated with
the failed processor become unavailable to all other processors in the system.
The following table shows the association between the CPUs and their
corresponding DIMM groups.
Processor
Number
0
2
1
3
222
Sun Fire V890 Server Service Manual • October 2005
CPU/Memory Slot
Slot A
Slot A
Slot B
Slot B
Associated DIMM Groups
A0, A1
B0, B1
A0, A1
B0, B1

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