Vmebus Interface And Vmechip2; I/O Interfaces; Serial Communications Interface - Motorola MVME162P-344 Series Installation And Use Manual

Functional Description

VMEbus Interface and VMEchip2

4

I/O Interfaces

Serial Communications Interface

4-12
to the description of the Petra MC2 function in the MVME1X2P4 VME
Embedded Controller Programmer's Reference Guide and to the M48T58
data sheet for detailed programming guidance and battery life information.
The VMEchip2 ASIC provides the local-bus-to-VMEbus interface, the
VMEbus-to-local-bus interface, and the DMA controller functions of the
local VMEbus. The VMEchip2 also provides the VMEbus system
controller functions. Refer to the VMEchip2 description in the
MVME1X2P4 VME Embedded Controller Programmer's Reference
Guide for detailed programming information.
Note that the Abort switch logic in the VMEchip2 is not used. The GPI
inputs to the VMEchip2 which are located at $FFF40088 bits 7-0 are not
used. Instead, the Abort switch interrupt is integrated into the Petra MC2
sector at location $FFF42043. The GPI inputs are integrated into the Petra
MC2 sector at location $FFF4202C, bits 23-16.
The MVME162P4 provides onboard I/O for many system applications.
The I/O functions include serial ports, IndustryPack (IP) interfaces, and
optional interfaces for LAN Ethernet transceivers and SCSI mass storage
devices.
The MVME162P4 uses a Zilog Z85230 serial port controller to implement
the two serial communications interfaces. Each interface supports CTS,
DCD, RTS, and DTR control signals, as well as the TXD and RXD
transmit/receive data signals and TXC/RXC synchronous clock signals.
The Z85230 sypports synchronous (SDLC/HDLC) and asynchronous
protocols. The MVME162P4 hardware supports asynchronous serial baud
rates of 110b/s to 38.4Kb/s.
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