Comtech EF Data SDM-650B Installation And Operation Manual page 298

Trojan Interface
The data rate synthesizer may take its input reference clock (REF_CLK) from one of four
different sources:
•
•
•
•
The phase-lock loop which locks to the reference has a very narrow bandwidth,
effectively dejittering the reference. The phase-lock loop can handle data rates from
32 kbit/s to 2.048 Mbit/s, in steps of 8 kHz. Transmit and receive data rates do not need
to be the same. If used, External Station Clock may range from 32 kHz to 10 MHz, in
steps of 8 kHz.
The Doppler buffer depth ranges from 512 to 32768 bits, in powers of 2. The buffer is
centered on power-up, start of service (when the modem receive section locks), or in case
of underflow or overflow. The buffer may also be centered manually. Buffer overflow
and underflow are logged as stored faults so that clock offset information may be
obtained.
RX DATA
TO CUSTOMER
RX CLOCK
TO CUSTOMER
STATION
REFERENCE
DIVIDE
BY
N
TX DATA RATE
CLOCK
TO CUSTOMER
TX DATA
FROM CUSTOMER
TX CLOCK
FROM CUSTOMER
G–2
Transmit clock
Receive clock
External Station Clock (MC)
Internal clock (SCT)
8 KHZ
RECEIVE
8 KHZ CLOCK LOOP
PHASE DETECTOR
8 KHZ
RECEIVE
8 KHZ CLOCK LOOP
PHASE DETECTOR
DIVIDE
BY
L
8 KHZ
RECEIVE
8 KHZ CLOCK LOOP
PHASE DETECTOR
DIVIDE
BY
P
FIFO
BUFFER
INT/EXT
TX CLOCK
Figure G-1. Trojan Interface Block Diagram
DOPPLER
BUFFER
RECEIVE VOLTAGE
CLOCK LOOP CONTROLLED XTAL
FILTER OSCILLATOR
DIVIDE
BY
512
VOLTAGE
RECEIVE
CONTROLLED
CLOCK LOOP
OSCILLATOR
FILTER
DIVIDE
BY
K
RECEIVE VOLTAGE
CLOCK LOOP CONTROLLED
FILTER
OSCILLATOR
DIVIDE
BY
M
SDM-650B Satellite Modem
MODEM RX DATA
MODEM RX CLOCK
MODEM SCT CLOCK
4.096 MHZ
DEJITTERED
RECEIVE
VCO FREQUENCY
(SEE TABLE)
DEJITTERED
TRANSMIT
VCO FREQUENCY
(SEE TABLE)
DEJITTERED
MODEM TX DATA
MODEM TX CLOCK
Rev. 5