Sequential Decoder/Demod Card; Figure 6-9. Sequential Decoder/Demod Card Test Points - Comtech EF Data SDM-650B Installation And Operation Manual

Maintenance

6.1.3.3 Sequential Decoder/Demod Card

Refer to Figure 6-9.
TPG1
TP8
TP1
TP2
TP3
TP4
TP5
TP9
TPG2
6–10
Ground.
VCXO Control Voltage.
Sweeps from -2.5V to +2.5 VDC.
IMAG — I Channel Magnitude Bit.
Result of the soft bits from the soft decision interface. Transitions will occur in the
presence of noise in the RF signal.
QSGN — Q Channel Sign Bit.
Result of the hard bits from the soft decision interface. 50% duty cycle random data
is displayed.
ISGN — I Channel Sign Bit.
Result of the hard bits from the soft decision interface. 50% duty cycle random data
is displayed.
QMAG — Q Channel Magnitude Bit.
Result of the soft bits from the soft decision interface. Transitions will occur in the
presence of noise in the RF signal.
SYMBOL CLOCK.
Result of the data clock recovery loop in the demod processor section.
DECODER LOCK.
TTL levels. TTL high indicates a locked condition. A TTL low indicates an unlocked
condition.
Ground.

Figure 6-9. Sequential Decoder/Demod Card Test Points

SDM-650B Satellite Modem
Rev. 6