Synchronous Serial Port (Ssp) Interface; Development Board Ssp Support; Ep80579 Ssp Interface - Intel EP80579 Manual

Integrated processor product line
Hide thumbs Also See for EP80579:
Table of Contents

Advertisement

Intel
24.0

Synchronous Serial Port (SSP) Interface

Synchronous Serial Port (SSP), is a hardware module whose primary function is to
provide connectivity between the EP80579 and external devices. The EP80579 supports
a single SSP port, however the port can be multiplexed to various devices. Each device
can be selected with a dedicated chip select. Only one device can be accessed at a
time. The SSP module supports National Microwire*, Texas Instruments* Synchronous
Serial Port (SSP) and Motorola* Serial Peripheral Interface (SPI).
Two of the most common port configuration modes to access external devices are SPI
and Microwire. Such interfaces can connect with RTC (Real-Time Clock), LCD (Liquid
Crystal Display), Digital Thermal Sensors, EPROM, Flash, etc.
Clocking can be derived internally or from an external source. The internal clock can be
selected from an internal, 3.6864 MHz source and divided down to the desired standard
frequency (for applications that require usage of the external input pin SSP_EXTCLK).
The input clock frequency is also 3.6864 MHz as well as the internal source clock, the
frequency can be divided down anywhere from 7.2 KHz to 1.84 MHz.
24.1

Development Board SSP Support

The Development Board provides SSP interface to all three mezzanine card connectors.
The SSP port, as well as a number of GPIO signals, are routed to all mezzanine
connectors. GPIO signals can be configured for input interrupts or outputs that can be
used to gate the chip select to access multiple devices with a single HSS port.
24.2

EP80579 SSP Interface

The EP80579 SSP interface has a total of five input/output signals. These signals can be
configured to the various hardware protocols supported by the SSP port. The following
tables show the five pins supported:
SSP_RXD
SSP_EXTCLK
®
Intel
EP80579 Integrated Processor Product Line
Platform Design Guide
251
®
EP80579 Integrated Processor Product Line—Synchronous Serial Port (SSP) Interface
Inputs
• Receive Data
• Must be tied high to a 10K ohm resistor when
the port is not connected to an interfacing
device.
• External Clock
• Must be tied high to a 10K ohm resistor when
the port is not connected to an interfacing
device.
May 2010
Order Number: 320068-005US

Advertisement

Table of Contents
loading

Table of Contents